Not really interesting in finding out zen4 efficiency with desktop parts, the i/O die is usually sniffing around 30%+ of the power alone in <100PPT comparisons, while Intel's ringbus is using less than 10W on Raptor dies, their cores get way more power to play with.
Now once phoenix makes it...
Intel is nice enough to detail their groups financials every quarter, all it takes is to read carefully.
And margins in their client groups dropping from 37 to 20, which is a FORTY FIVE PERCENT drop tells anyone that they're giving away chips.
Don't worry though, their datacenter group is doing...
Pat probably thought its better to make no profit and have fabs utilized than have even less profit and have fabs sitting idle, even if margins have to drop to single digits..
the old managment would never sacrifice margins
Intel flooding the channel with cheap chips, while AMD is trying to keep margins, just look at the Q3 CCG margin drop YoY, from 37% to 20%, like datacenter they're giving away chips for peanuts.
I seriously doubt this is sustainable for Intel, but best of luck to them.
Not actively following smartphone SoCs but I think the PHY(which should logically use the most power) should be integrated while the MAC and antennas should be separate. Happy to be corrected on this.
If Phoenix is using CoWoS or whatever fancy name it goes under now like N31 is using then I see little point in not moving the GPU to its own die, active power should be minimal but the benefits of moving the GPU chiplet to a different node with denser libraries that the CPU portion can't use...
CapframeX has an axe to grind against Ryzen for the last half year, and quite publicly at that, I trust his word as much as I trust userbenchmark.
Even if it is true, one two or even five cases where SMT and 1CCD off is beneficial does not negate the hundred others where it matters absolutely...
Genoa single core gets similar score to a 4.4/4.5GHz Cezanne APU, quite impressive.
We've been fed 2.7-3.0GHz single core mainstream (non-F) server chips for years, finally improvements are in order.
Raptor's biggest improvement comes from fixing low clocking stock ringbus, anyone tuning ADL would have fixed that first and foremost before attempting anything else.
It's gonna be real close, Raptor has a decent clock boost against 12900k, but not against the KS and tuned vs tuned will look...
Linux performance for new chips usually improves quite a decent bit in the half year following the launch, so it should look even better.
The effect is amplified for server chips while kernel maintainers tweak the NUMA settings
4090 seems to have a bit of issue utilizitng its hardware at under 1440p, probably half due to CPU bottleneck and half to due low shader utilization, probably a good niche for AMD to carve out for themselves, 3D Raphael might actually push high end GPU sales
Lack of R&D probably led to ignoring the 4S/8S server market Intel had on lockdown, if AMD gets to 50% server marketshare they'll probably start targeting that as well.
Guess that would require a faster socket to socket interconnect?
Cache latency is _primarily_ determined by wire distance, which V-cache doesn't have a problem with, 2D caches can only go wider, increasing distance from the core V-cache sits near the core, which is why V-cache is only 4 cycles higher than the regular Veremeer L3 for 3x the size.
If not the...
That's the public excuse, much more likely is that 3D-cache uses HD cells and they don't really like going over 1.3V, 3Dcache and base die share the same voltage rail in Milan-X and 5800XD so the die itself isn't allowed to go above that limiting Fmax
That's what happens when you introduce a new product into the mix that uses a new node, near overnight 60%+ increase in volume, you don't stop selling N7 SKU and you won't stop selling them even when N3 hits. Milan is still much, much cheaper to make than Sapphire Rapids, lower TCO and has...
That's the problem with aggregate/geometric mean scores, if you only look at them while not looking at what workloads are tested it can end up looking like there's minimal generation improvement.
For example, 20 tests, 14 are ST/2thread bound, rest don't scale beyond 6-8 cores.
Would make 24C...
That single thread score looks like a joke, almost 30% off from desktop chips.
I know they're laptops but geekbench is bordering on microbenchmark territory, so boosting for seconds shouldn't be a problem
Whole package change like ADL, massive increase in int/fp registers and in flight load and stores, 6 wide or more at least, OoO resrouces out of the wazoo, I fully expect them to either double or 1.5x increase (almost) everything zen4 has
Though I think avx512 will remain "double pumped"...
The regular 64MB of L3 that Raphel(Dragon) has is technically still "highest ever for a mobile gaming CPU"
But I agree that v-cache would let AMD chips end up in some really high margin laptops
E-cores or "cinnebench accelerators" as I've recently started calling them only exist because the P-cores are extremely area and power inefficient. Intel wouldn't even be making this clumsy hybrid design that needs a constant updates to software crutch (thread director) and disabling of half the...
No need for TJmax adjustment, and likely no motherboard will support that, just lower the PPT by a bit and you won't be hitting 95C, assuming your cooling isn't anemic.
Read this
https://www.mersenneforum.org/showthread.php?p=614191
tl;dr is that the frontend has much less work to do with avx512, so that saves power. And since AMD's avx512 is "double pumped", it doesn't have that extra FMA port gimping clockspeeds and eating the power budget
Computerbase has done 65-140W benchmarks of around 10 different tests, not much change, zen4 is an absolute efficiency monstrosity at anything under 9W per core (probably even more since I'm including the I/O die)
Also much saner temperatures at any ECO stop
Notice how the new boost (run to...
https://www.computerbase.de/2022-09/amd-ryzen-7950x-7900x-7700x-7600x-test/2/
Those ECO mode numbers are outright disgusting, 65(83?)W 7950X faster than a 12900k across 9 multithreaded benchmarks.
I seriously doubt those power figures at those clocks, more than likely sensors not reading it properly, wish we had more power testing directly from the rails
Seems like really going mITX is the way to go, a PCIe slot does wonders for futureproofing if I decide to get a U2 expander or put that good ol' m1015 to use, even tho I had quite some issues with ivybridge gigabyte boards refusing to detect it.. the wonders of server hardware on consumer...
NUC and SBC like boards don't usually have power control from what I remember, and this wouldn't be a gaming machine so I wouldn't install windows on it, so no ryzen master ( i don't think even laptops have it?)
Linux has some SMU control mechanisms but they're very unofficial, and i don't want...
I seem to recall quite a number of people calling zen4 "dieshrunk zen3" very satisfied with the performance while core counts stayed the same.
Now if only we could get a <65W SKU that can be used for SFF
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