Discussion Speculation: Zen 4 (EPYC 4 "Genoa", Ryzen 7000, etc.)

Vattila · Oct 6, 2019

Except for the details about the improvements in the microarchitecture, we now know pretty well what to expect with Zen 3.

The leaked presentation by AMD Senior Manager Martin Hilgeman shows that EPYC 3 "Milan" will, as promised and expected, reuse the current platform (SP3), and the system architecture and packaging looks to be the same, with the same 9-die chiplet design and the same maximum core and thread-count (no SMT-4, contrary to rumour). The biggest change revealed so far is the enlargement of the compute complex from 4 cores to 8 cores, all sharing a larger L3 cache ("32+ MB", likely to double to 64 MB, I think).

Hilgeman's slides did also show that EPYC 4 "Genoa" is in the definition phase (or was at the time of the presentation in September, at least), and will come with a new platform (SP5), with new memory support (likely DDR5).

What else do you think we will see with Zen 4? PCI-Express 5 support? Increased core-count? 4-way SMT? New packaging (interposer, 2.5D, 3D)? Integrated memory on package (HBM)?

Vote in the poll and share your thoughts!

Hans Gruber · Jan 2, 2022

DrMrLordX said:
Who is asking for more cores in AMD's mainstream lineup? People in the 24-32c+ contingent are asking for an updated Threadripper. That's the crowd that wants the extra memory channels, PCIe lanes, and other features missing from AM4 (and that will still be missing from AM5).

It was actually consumers who were asking for more cores. AMD always pointed to threadripper with more cores. The threadripper crowd has been waiting for Zen 3 threadripper. I remember that Dr. Su said that AMD had the capability to scale their processors for more cores if and when needed. The benefit of being on 7nm meant there was more real estate for more cores. Now Intel is on 10nm and AMD will be on 5nm at the end of 2022 with Zen4.

I guess Alder Lake and the next iteration from Intel will determine how many cores AMD puts in their mainstream CPU line.

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JoeRambo · Jan 2, 2022

IntelUser2000 said:
Same will be true with Sapphire Rapids, as it was with Skylake-X. Skylake-X was 5-10% slower, because it's a server platform. Sapphire Rapids-X is going to be a monster HEDT platform, but it'll lag Alderlake(probably Raptorlake at that time) in games.

This time it's gonna be more interesting, as SKL-X was first try at mesh architecture and suffered from these ills:

1) L3 was no longer fast and inclusive
2) L2 while large was slower in latency than on desktop
3) interconnects and L3 bandwidth were anemic
4) memory latency was 15-20ns slower than comparable desktop setup due to quad controller and slow L3 and interconnects

SR-X is gonna be interesting, cause desktop ADL already moved to slowish L3, large but slow L2. Interconnects and L3 are not exactly stellar either ( compared to ZEN3). Memory latency is a joke already, extra latency won't ruin anything.

So it has all chances to perform very similar to desktop at same clocks and if L3 cache is sufficiently large, it can have Z3D like effect on gaming performance and push the chip ahead of desktop.
Oh and don't forget the advantages of avoiding marketing inflicted damage on performance in the form of schedulers and OS woes.

DrMrLordX · Jan 2, 2022

Hans Gruber said:
It was actually consumers who were asking for more cores.

Who? I don't believe that for a second. Nobody wanted more than 16 cores without at least additional memory channels. That would have been goofy on AM4.

Alder Lake won't determine AMD's future consumer socket core count at all.

Mopetar · Jan 2, 2022

Hans Gruber said:
It was actually consumers who were asking for more cores.

Well some of them. Another bunch want better integrated graphics. One lot wants a fast gaming CPU. There's always a contingent that just wants the least expensive product and I'm sure I've missed several other little cadres with their own unique desires. Oh yeah, the people who want lower operating power/cost. How'd I forget them?

There's too many different groups pulling in too many different directions to even satisfy half of them. The best you can do is address markets as best you can and are capable of without spreading yourself too thin or alienating everyone in an attempt to appease everyone.

Ajay · Jan 2, 2022

DrMrLordX said:
Who? I don't believe that for a second. Nobody wanted more than 16 cores without at least additional memory channels. That would have been goofy on AM4.

Alder Lake won't determine AMD's future consumer socket core count at all.

Good point. Adding another CCD without giving the CPU a third memory channel would disrupt the balance of resources in the Zen architecture. Data heavy workloads wouldn’t see much gain.

LightningZ71 · Jan 2, 2022

Unless you significantly increased the size of the last level cache to reduce the perceived load on the memory controller and adjusted the preferring algorithm to be more aggressive with predictive preloads.

Wait, isn't AMD working on some way to triple or more increase the L3 cache on their CCDs? (/s)

Yes, I realize that, at some point, the data still needs to get from memory to that L3 cache, and that there are some workloads that have vastly larger datasets that would dwarf the stacked L3 cache. But, then, isn't memory bandwidth increasing significantly with DDR5 as well? The point is, if 16 cores are working well with dual channel DDR4, then 24 cores (a 50% increase) should work well with "dual" channel DDR5, which, with the commercially available sticks out now, we're seeing in the actual benchmarks, is providing 50+% better bandwidth than JEDEC 3200 DDR4. So, even if Zen4 provides a 20% throughput uplift, it's not going to be far above Zen3 in memory demands per core.

24 cores of Zen4 with decent "dual" channel ddr5 should have a similar memory bandwidth to core demands balance to the existing 5950x. In addition, if stacked L3 makes it to that product, effectively, it may even be better.

Though, I still believe that such a product would be better served on the TR platform.

Mopetar · Jan 2, 2022

I think it really depends on how they go about structuring that cache. You'll get vastly different performance in some applications with a cache that has a larger number of entries vs another that uses any additional space for having longer cache lines for each entry.

dnavas · Jan 2, 2022

DrMrLordX said:
Who is asking for more cores in AMD's mainstream lineup? People in the 24-32c+ contingent are asking for an updated Threadripper. That's the crowd that wants the extra memory channels, PCIe lanes, and other features missing from AM4 (and that will still be missing from AM5).

Yep, and it's so late, some of us are wondering why we'd pay for last-gen memory and pcie -- twice as many and half as capable isn't really much of an advantage. I continue to question the wisdom of ordering the IOD updates in lock-step with the core updates, but there are coordination issues decoupling the two(*), there are availability issues, and here we find ourselves. There are likely those that will pay for a dual-CPU TR-Pro, and that kind of setup might have the connectivity advantage over AM5 that we're looking for, but it's a poor replacement for better execution. If you need two CPUs to get the desired IO surface, the value of the individual CPU is reduced. Everyone raise their hands who thinks AMD will make their Zen3 TRs cheaper than last gen (cref the marketing term "Pro" attached to rumors of late).... The resulting kerfuffle is likely to lead people to wonder what the future strategy of "desktop-epyc" is.

(*) I note that getting the interfaces nailed down early on the IOD is going to be required for GPU and any future integration with other *PUs. Iteratively innovating on this solution is going to be challenging, but I really hope they figure it out.

jpiniero · Jan 2, 2022

dnavas said:
The resulting kerfuffle is likely to lead people to wonder what the future strategy of "desktop-epyc" is.

That's what Threadripper Pro literally is, esp if 2P is going to be supported. It's pricing is also comparable to what Epyc is too.

Mopetar · Jan 2, 2022

jpiniero said:
That's what Threadripper Pro literally is, esp if 2P is going to be supported. It's pricing is also comparable to what Epyc is too.

I'm sure there are people who'd gladly buy a 2P TR, but at what point does that start to eat into Epyc sales? Anyone who could afford to buy a 2P TR box could probably be enticed to pay just a little bit more for a similar Epyc system.

I suppose AMD could always control that through pricing, but at that point what's the practical difference and why even bother having two separate products if there's almost no difference between them.

jpiniero · Jan 2, 2022

Mopetar said:
I'm sure there are people who'd gladly buy a 2P TR, but at what point does that start to eat into Epyc sales? Anyone who could afford to buy a 2P TR box could probably be enticed to pay just a little bit more for a similar Epyc system.

The TR Pro so far is coming out much later. The TR Pro is also likely leakier dies.

LightningZ71 · Jan 2, 2022

Wasn't the point of TR to offer essentially near Epyc scale I/O, but with significantly highe clock speeds? I'm expecting TR pro to have almost 1Ghz per core advantage over an equivalent Epyc processor, but probably at much higher power draw.

jpiniero · Jan 2, 2022

LightningZ71 said:
Wasn't the point of TR to offer essentially near Epyc scale I/O, but with significantly highe clock speeds? I'm expecting TR pro to have almost 1Ghz per core advantage over an equivalent Epyc processor, but probably at much higher power draw.

Higher boost clocks yes.

Hans Gruber · Jan 2, 2022

I am not against the threadripper platform. It's just been MIA for Zen 3. That is why I am focusing on the mainstream Ryzen platform. Obviously AMD should have considered including integrated graphics in Zen 3 let alone the Zen 4 platform. Most people never use integrated graphics but it's nice to have if you lose a GPU or are moving GPU's from machines.

moinmoin · Jan 2, 2022

Hans Gruber said:
AMD has said in the past that they could have a core war with Intel.

AMD also has said that they'll support AM4 through 2020. We're in 2022 now.

DrMrLordX · Jan 2, 2022

dnavas said:
Yep, and it's so late, some of us are wondering why we'd pay for last-gen memory and pcie -- twice as many and half as capable isn't really much of an advantage. I continue to question the wisdom of ordering the IOD updates in lock-step with the core updates, but there are coordination issues decoupling the two(*), there are availability issues, and here we find ourselves. There are likely those that will pay for a dual-CPU TR-Pro, and that kind of setup might have the connectivity advantage over AM5 that we're looking for, but it's a poor replacement for better execution. If you need two CPUs to get the desired IO surface, the value of the individual CPU is reduced. Everyone raise their hands who thinks AMD will make their Zen3 TRs cheaper than last gen (cref the marketing term "Pro" attached to rumors of late).... The resulting kerfuffle is likely to lead people to wonder what the future strategy of "desktop-epyc" is.

(*) I note that getting the interfaces nailed down early on the IOD is going to be required for GPU and any future integration with other *PUs. Iteratively innovating on this solution is going to be challenging, but I really hope they figure it out.

Not saying anything here is wrong, but it's obvious that AMD should have struck in August 2021 or earlier with Zen3 Threadripper and didn't. It's left a small-but-conspicuous void in their product lineup. We all know why it happened, though, don't we? Milan buyers pay more and the binning on N7 has likely become so effortless that AMD has found ways to sell all their CCDs in Milan. If they really were stockpiling "bad" CCDs that could pass as TR but not as Milan, we'd have Zen3 TR by now.

And there's the rub:

Hans Gruber said:
I am not against the threadripper platform. It's just been MIA for Zen 3. That is why I am focusing on the mainstream Ryzen platform.

I'm not either, it's just that AM4 in particular never really was meant for core counts higher than 16. The memory subsystem probably wouldn't support it particularly well. The socket/pin count possibly can't handle it (size constraints). The standard I/O die probably wouldn't cut it. And most of those imaginary 24c and 32c SKUs that would have/could have come out on AM4 should all those other barriers be overcome in some way, would still likely be power restricted to 142W out-of-the-box.

deasd · Jan 3, 2022

I think if Zen4 has DDR4 support, Zen3+(Rembrandt) might support as well.

https://twitter.com/x/status/1477260483480539138

eek2121 · Jan 3, 2022

IntelUser2000 said:
If Zen 3D is coming for desktop and servers I don't expect Zen 4 until Q3 or Q4 of this year.

That's not possible without them designing an entirely separate CPU and platform from Ryzen and Threadripper. Threadripper uses the server platform.

It's not like there was a huge difference anyway. People are arguing about 5-10% differences. That extra 5-10% requires a low latency memory controller and algorithms designed for that.

Almost like saying SUVs aren't good as sedans in pure passenger cars! Of course not!

Zen 4 will likely be announced/demoed Computex and launched a few weeks later.

I don't personally think AMD needs a 24 core CPU, even on AM5. I have a ton of multicore workloads, and while I would benefit, I worry the increased core count would eat significantly into multicore frequencies.

soresu · Jan 3, 2022

eek2121 said:
Zen 4 will likely be announced/demoed Computex and launched a few weeks later.

I don't personally think AMD needs a 24 core CPU, even on AM5. I have a ton of multicore workloads, and while I would benefit, I worry the increased core count would eat significantly into multicore frequencies.

Why?

If they are using chiplets I don't think that multicore frequencies should be all that problematic considering what they have managed with Threadripper.

What worries me more is the addition of AVX512 and the frequency throttling that this may bring.

V cache also has the potential to impact clock frequnecies too if they start stacking them more than just 1 high on the CCD - unless they can manage to shave the thickness down to the point that the SRAM dies stacked together are barely any different from the Zen3D SKUs about to be released.

yuri69 · Jan 3, 2022

The V-Cache has a potential to increase the avg latency for L3 access and also eat from the overall SoC TDP budget. It's gonna be very interesting to see its effects in a very broad set of workloads - for both Milan-X and "Ryzen-X".

The preliminary Milan-X data published by Microsoft show perf gains ranging from ~3% to ~80% which is nice given the TDP being kept the same. Still nothing on "Ryzen-X" and related latency-sensitive workloads.

maddie · Jan 3, 2022

eek2121 said:
Zen 4 will likely be announced/demoed Computex and launched a few weeks later.

I don't personally think AMD needs a 24 core CPU, even on AM5. I have a ton of multicore workloads, and while I would benefit, I worry the increased core count would eat significantly into multicore frequencies.

I can't understand the thinking here.

If you have a scalable multicore workload, then you will benefit from more cores even if the max f is lower.

Could AMD implement power control features that scale core frequencies better with regards to overall loads on cores. Ideally you scale each core independently as needed. Aren't they implementing a vastly better power management system in Zen 4? Could this be it?

moinmoin · Jan 3, 2022

yuri69 said:
The V-Cache has a potential to increase the avg latency for L3 access

That's very likely the case, and while the difference should be comparatively small it still makes the L3$ size increase a balancing act with both advantages and disadvantages.

Chips and Cheese had a very good writeup on that very topic:

Do IBM’s Giant L3 and V-Cache Represent the Future?

IBM showed off a giant 256 MB L3 during its Telum presentation at Hot Chips 2021, and ignited discussion about whether that represents the future of caches. That’s not the first time we&#8217…

chipsandcheese.com

eek2121 · Jan 3, 2022

soresu said:
Why?

If they are using chiplets I don't think that multicore frequencies should be all that problematic considering what they have managed with Threadripper.

What worries me more is the addition of AVX512 and the frequency throttling that this may bring.

V cache also has the potential to impact clock frequnecies too if they start stacking them more than just 1 high on the CCD - unless they can manage to shave the thickness down to the point that the SRAM dies stacked together are barely any different from the Zen3D SKUs about to be released.

maddie said:
I can't understand the thinking here.

If you have a scalable multicore workload, then you will benefit from more cores even if the max f is lower.

Could AMD implement power control features that scale core frequencies better with regards to overall loads on cores. Ideally you scale each core independently as needed. Aren't they implementing a vastly better power management system in Zen 4? Could this be it?

Ryzen currently only has a 125/142W TDP. The more cores you have, the larger the frequency drops will be. This especially applies to N5 vs N7 because heat density will be higher on N5 unless AMD takes steps to mitigate.

AMD could bump up the TDP for high core count models (rumors have suggested they are doing this), but as of yet they have not.

Threadripper has a much higher TDP to work with.

maddie · Jan 3, 2022

eek2121 said:
Ryzen currently only has a 125/142W TDP. The more cores you have, the larger the frequency drops will be. This especially applies to N5 vs N7 because heat density will be higher on N5 unless AMD takes steps to mitigate.

AMD could bump up the TDP for high core count models (rumors have suggested they are doing this), but as of yet they have not.

Threadripper has a much higher TDP to work with.

I disagree.

The V/f curve essentially means you get more CPU performance/ watt (at least until you reach min V) for multithreading workloads by increasing core number.

Essentially you pack as many cores as possible at min V for a given power.

Mores cores operating at lower frequencies have a lower heat flux (lower V & f), so you will always be better off (for a given architecture) in dissipating heat from the CPU.

IntelUser2000 · Jan 3, 2022

eek2121 said:
I don't personally think AMD needs a 24 core CPU, even on AM5. I have a ton of multicore workloads, and while I would benefit, I worry the increased core count would eat significantly into multicore frequencies.

We're not in 2005 anymore where multiple cores meant frequencies are reduced for workloads of all threads.

If they have a 24 core CPU, I assure you at 16 cores it'll be clocked just as high as Zen 3. And everything beyond 16 cores, it'll be faster anyways. That's why Turbo is great!

Discussion Speculation: Zen 4 (EPYC 4 "Genoa", Ryzen 7000, etc.)

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