Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

Tigerick · Aug 22, 2022

As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.

Comparison of upcoming Intel's U-series CPU: Core Ultra 100U, Lunar Lake and Panther Lake

Model	Code-Name	Date	TDP	Node	Tiles	Main Tile	CPU	LP E-Core	LLC	GPU	Xe-cores
Core Ultra 100U	Meteor Lake	Q4 2023	15 - 57 W	Intel 4 + N5 + N6	4	tCPU	2P + 8E	2	12 MB	Intel Graphics	4
?	Lunar Lake	Q4 2024	17 - 30 W	N3B + N6	2	CPU + GPU & IMC	4P + 4E	0	8 MB	Arc	8
?	Panther Lake	Q1 2026 ?	?	Intel 18A + N3E	3	CPU + MC	4P + 8E	4	?	Arc	12

Comparison of die size of Each Tile of Meteor Lake, Arrow Lake, Lunar Lake and Panther Lake

	Meteor Lake	Arrow Lake (20A)	Arrow Lake (N3B)	Arrow Lake Refresh (N3B)	Lunar Lake	Panther Lake
Platform	Mobile H/U Only	Desktop Only	Desktop & Mobile H&HX	Desktop Only	Mobile U Only	Mobile H
Process Node	Intel 4	Intel 20A	TSMC N3B	TSMC N3B	TSMC N3B	Intel 18A
Date	Q4 2023	Q1 2025 ?	Desktop-Q4-2024 H&HX-Q1-2025	Q4 2025 ?	Q4 2024	Q1 2026 ?
Full Die	6P + 8P	6P + 8E ?	8P + 16E	8P + 32E	4P + 4E	4P + 8E
LLC	24 MB	24 MB ?	36 MB ?	?	8 MB	?
tCPU	66.48
tGPU	44.45
SoC	96.77
IOE	44.45
Total	252.15

Intel Core Ultra 100 - Meteor Lake

As mentioned by Tomshardware, TSMC will manufacture the I/O, SoC, and GPU tiles. That means Intel will manufacture only the CPU and Foveros tiles. (Notably, Intel calls the I/O tile an 'I/O Expander,' hence the IOE moniker.)

moinmoin · Mar 7, 2024

FlameTail said:
Which is why consumer ARM cores don't have have multithreading.

More like ARM first went to more cores whereas x86 first added SMT. Since most ARM SoCs already had plenty cores by contemporary standards lacking SMT no longer was a pressing issue.

Henry swagger · Mar 7, 2024

Khato said:
I tend toward believing the Mercury Research market share numbers rather than any individual retailer - https://www.tomshardware.com/pc-com...new-mercury-research-data-shares-q4-2023-data

Simple fact is that Intel knows how to sell its processors on the client side as evidenced by their revenue share being higher than their unit share. Consumer marketing/brand recognition combined with supporting OEM designs goes a long way in selling products. Being notably ahead on the technical merits of the product is primarily helping AMD on the large scale server deployments.

Plus intel has a more trusted and known brand with quality

Hulk · Mar 7, 2024

ondma said:
I am disappointed at the lack of hyperthreading or increased E cores, but considering all the E cores in 14900k I doubt that HT adds 20% to overall performance.

You are right, it's 15% in CB. Still significant.
The increase in the P cores is 30% (in CB) due to HT. 389 pts/GHz to 512 pts/GHz, but that is of course mitigated in the overall scores due to the non-HT E cores. Still 15% right off the bat just to break even is a lot, plus they have to make up for the decrease in frequency AND tile latency.

That's about 20%. Let's say they get +20% from Raptor Cove to Lion Cove, which I think is a lot, and Skymont makes up 10% of the MT deficit. We could see 10% improvement from Lion Cove. Except for the fact that they could be losing 10% in frequency! Every time I do the math on this it just seems really tough for Intel to beat Raptor Lake at the top of the stack.

The MT problem is even more severe down the stack where the ratio of P to E cores increases.

Hulk · Mar 7, 2024

FlameTail said:
Which is why consumer ARM cores don't have have multithreading.

Problem is Intel has done a lot of "hat hanging" on CB MT.

Hulk · Mar 7, 2024

coercitiv said:
When Intel already has 10 cores in their lowest i5 SKU, the lack of HT in ARL will be more of a spreadsheet problem than a consumer problem. The only thing they need to do is increase core count for Ultra 3 or whatever they'll call it (the current i3).

Without even looking for actual measurements, with the conventional wisdom of "1P=2E" and "SMT=20-25%" we should be looking at a 10-12% loss in MT due to removal of SMT... and that's in Cinememe scores since for actual workloads SMT thread should be the last in the queue and most consumer workloads simply won't scale beyond the E core spam.

All we really need from ARL is stronger ST perf and minimized latency tradeoffs due to tiled structure.

Good estimates. Using my CB data with an 8+16 part they are looking at having to make up 15% for MT in the worst case Cinebench "ridiculously multi-threaded scenario.

Of course the issue is exacerbated with parts down the stack where the P to E core ratio increases.

SiliconFly · Mar 7, 2024

Hulk said:
Of course I'm not overlooking the additional transistor budget afforded by a node shrink. That is the basis for architectural improvements. My point is that the move to tiles, lack of HT, and extremely high Intel 7 clocks make the normal jump all the more difficult. They have to gain A LOT of IPC just to break even.

Since it's a bit more than a 2X node jump for LNC, it's gonna get a huge transistor budget due to the massive density increase which should easily compensate for the loss in Fmax. The same way Apple & Zen get additional performance when they move to a newer node. Similarly, LNC should get a lot of IPC increase too. How much increase is hard to say until they reveal the architecture, ES, etc.

Hulk · Mar 7, 2024

SiliconFly said:
Since it's a bit more than a 2X node jump for LNC, it's gonna get a huge transistor budget due to the massive density increase which should easily compensate for the loss in Fmax. The same way Apple & Zen get additional performance when they move to a newer node. Similarly, LNC should get a lot of IPC increase too. How much increase is hard to say until they reveal the architecture, ES, etc.

How much of a transistor density increase do you think we're talking about going from Intel 7 to the TMSC node?

Hulk · Mar 7, 2024

I created a little ARL calculator in Excel. Red font are my guesses, blue font is calculated from guesses, and black font is known.
Based on this input data I'm seeing ARL needing 20% Lion Cove IPC improvement and 22% Skymont IPC improvement to equal the 14900K in MT. Of course in ST this ARL model beats Raptor Cove easily.

If you have a prediction give me your numbers and I will run them. All I need is your Lion Cove/Skymont IPC improvement percent, and ST and MT frequencies for P cores, and frequency for E cores.

SiliconFly · Mar 7, 2024

Hulk said:
How much of a transistor density increase do you think we're talking about going from Intel 7 to the TMSC node?

A minimum of 2.5X (up to ~3+). Node density numbers are not very consistent as each node has different set of libraries and hence different densities. And each foundry quotes what they think is best for them (makes apples-to-apples comparison difficult). But general speaking, Intel 7 is around 100 MTr/mm2 I think and 20A is expected to be a lot denser than Intel 7.

I also remember reading a report which said that... even though densities keep increasing, the cost per transistor remains the same as newer nodes are more expensive. So, it's hard to say how much of an additional transistor budget LNC is gonna get due to cost concerns. But it better be a lot, otherwise it won't stand against competition.

SiliconFly · Mar 7, 2024

Hulk said:
I created a little ARL calculator in Excel. Red font are my guesses, blue font is calculated from guesses, and black font is known.
Based on this input data I'm seeing ARL needing 20% Lion Cove IPC improvement and 22% Skymont IPC improvement to equal the 14900K in MT. Of course in ST this ARL model beats Raptor Cove easily.

If you have a prediction give me your numbers and I will run them. All I need is your Lion Cove/Skymont IPC improvement percent, and ST and MT frequencies for P cores, and frequency for E cores.

You haven't factored in additional ST performance due to removal of HT. I'm just taking a wild guess here... but I think it should be well above 10%.

Additional transistor budget should bring in at least 5% or more.

LNC architectural improvements should be at least double digits hopefully, which should be at least 10% or more.

Just wild guesses, but shouldn't be too off from the final product I think.

Hulk · Mar 7, 2024

SiliconFly said:
You haven't factored in additional ST performance due to removal of HT. I'm just taking a wild guess here... but I think it should be well above 10%.

Additional transistor budget should bring in at least 5% or more.

LNC architectural improvements should be at least double digits hopefully, which should be at least 10% or more.

Just wild guesses, but shouldn't be too off from the final product I think.

All architectural improvements are "built in" to the ST performance IPC improvement percentage.

So what are you thinking ST improvement from Raptor Cove to Lion Cove? I am estimating 20%. Are you thinking 30%? We have not seen the likes of that type of improvement since P4 to Conroe. I'm not saying it's not possible, just wondering where you put the number?

At the end of the day all iso-frequency improvements come primarily from architectural improvements, especially when the memory subsystem remains the same between generations or the new generation doesn't leverage some new instruction(s) only used for some specific software.

Lion Cove and Skymont vs. Raptor Cove and Gracemont at iso-frequency in CB R23, how much improvement? This is really what it comes down to. We can estimate release clocks pretty well.

You are also right when it comes to transitioning the HT structures to improve ST performance. I think much of that will go into better OoO logic and cache structures.

AMDK11 · Mar 7, 2024

Following the lead of SunnyCove and GoldenCove, the expansion of LionCove logic is at least 30-40%. I don't expect any smaller expansion. Of course, the more the better.

igor_kavinski · Mar 7, 2024

Intel's Computex 2024 keynote to include next-gen client product showcase, Arrow Lake incoming? - VideoCardz.com

Intel CEO Pat Gelsinger to deliver Computex 2024 keynote Pat Gelsinger is now confirmed to keynote at Computex 2024 on June 4th. According to the press release, Intel will showcase its next-generation data-center and client products. For the client segment, Intel is expected to deliver updates...

videocardz.com

Imagine Lisa blowing away the crowd with pre-shipping silicon benchmarks of Zen 5 and then Pat follows that up with...gaming chips with AI!!!!

Yeah, that's just what the world needs, Pat.

SiliconFly · Mar 7, 2024

Hulk said:
All architectural improvements are "built in" to the ST performance IPC improvement percentage.

So what are you thinking ST improvement from Raptor Cove to Lion Cove? I am estimating 20%. Are you thinking 30%? We have not seen the likes of that type of improvement since P4 to Conroe. I'm not saying it's not possible, just wondering where you put the number?

At the end of the day all iso-frequency improvements come primarily from architectural improvements, especially when the memory subsystem remains the same between generations or the new generation doesn't leverage some new instruction(s) only used for some specific software.

Lion Cove and Skymont vs. Raptor Cove and Gracemont at iso-frequency in CB R23, how much improvement? This is really what it comes down to. We can estimate release clocks pretty well.

You are also right when it comes to transitioning the HT structures to improve ST performance. I think much of that will go into better OoO logic and cache structures.

I'm too expecting at least around ~20% ST gains (+/- 5%). But then again, Intel being Intel, we may end up with nothing due to "various" reasons. Hoping they reveal something good sooner instead of constantly disappointing everyone.

Hulk · Mar 7, 2024

AMDK11 said:
Following the lead of SunnyCove and GoldenCove, the expansion of LionCove logic is at least 30-40%. I don't expect any smaller expansion. Of course, the more the better.

So are you hoping for something like this?

SiliconFly · Mar 7, 2024

igor_kavinski said:
...then Pat follows that up with...gaming chips with AI!!!!

Technically speaking, MTL is a gaming chip with AI. But sadly, it isn't showing any intelligence as of now.

Henry swagger · Mar 7, 2024

Hulk said:
So are you hoping for something like this?

5.5ghz on intel 20A is to high.. mayb 5ghz

igor_kavinski · Mar 7, 2024

Henry swagger said:
5.5ghz on intel 20A is to high

Intel's trusted brand and quality make anything possible!

igor_kavinski · Mar 7, 2024

Hulk said:
So are you hoping for something like this?

That sheet really drives home the uphill struggle Intel is facing. Seems impossible. It'll be a red letter day for them if that comes true.

AMDK11 · Mar 7, 2024

Hulk said:
So are you hoping for something like this?

I think that looking at the average of the IPC growth curve of SunnyCove +18% and GoldenCove +19%, LionCove +20% is at least a 30-40% expansion of the core logic. If the expansion is larger than before, for example 40-50+% more, the average of the IPC curve will be higher. Anything less than 18-20% IPC increase will be a failure due to the fact that LionCove is not for one generation, but at least 2.

igor_kavinski · Mar 7, 2024

AMDK11 said:
Anything less than 18-20% IPC increase will be a failure due to the fact that LionCove is not for one generation, but at least 2.

Has Intel stated that as a fact? I thought ARL would be followed up by Panther Lake, not a refresh of ARL.

FlameTail · Mar 7, 2024

igor_kavinski said:
Has Intel stated that as a fact? I thought ARL would be followed up by Panther Lake, not a refresh of ARL.

MLID has said the 8P+32E version is for ARL refresh.

That lines up with the rumours from other sources too.

AMDK11 · Mar 7, 2024

igor_kavinski said:
Has Intel stated that as a fact? I thought ARL would be followed up by Panther Lake, not a refresh of ARL.

Don't believe that the second generation after ArrowLake will be anything other than something like RaptorLake compared to AlderLake, i.e. GoldenCove with L2 2MB instead of 1.25MB. Intel doesn't have to confirm anything here because these are historical facts. If they provide an improved microarchitecture or a completely new one compared to LionCove, it will be a very big surprise.

I sincerely doubt that the second generation after ArrowLake will not be something like RaptorLake with GoldenCove L2 2MB instead of 1.25MB and more cores due to the design time that takes a lot of time.

If the ArrowLake refresh from PantherLake is new Cove cores, the changes in LionCove are smaller than in SunnyCove and GoldenCove. This is my current position on this topic.

igor_kavinski · Mar 7, 2024

FlameTail said:
MLID has said the 8P+32E version is for ARL refresh.

Imagine if AMD counters that with 8 core Zen5+16 core Zen5c WITH HT...

SiliconFly · Mar 7, 2024

igor_kavinski said:
Has Intel stated that as a fact? I thought ARL would be followed up by Panther Lake, not a refresh of ARL.

Actually, LNC spans generations.

And Panther Lake is a low-power SoC like Lunar Lake. A niche low volume product for a small market. Mainstream cpu is still gonna be ARL Refresh.

A lot rides on LNC. Shows Intel has a lot of confidence in LNC. Thats one of the key reasons ARL is gonna be a decent product I think.

Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

Senior member

Attachments

Diamond Member

Senior member

Diamond Member

Diamond Member

Diamond Member

Golden Member

Diamond Member

Diamond Member

Attachments

Golden Member

Golden Member

Diamond Member

Senior member

Lifer

Golden Member

Diamond Member

Attachments

Golden Member

Senior member

Lifer

Lifer

Senior member

Lifer

Platinum Member

Senior member

Lifer

Golden Member