Recent content by AMDK11

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Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

NovaLace is supposedly CuguarCove from what the P-Core engineer said recently. As for NovaLake, I assumed it was a new core but I wasn't sure about PantherLake but I also suspected it was something like LionCove or its improvement.
- AMDK11
- Post #19,227
- Apr 21, 2025
- Forum: CPUs and Overclocking
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Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

Question for 100 points. Is PantherLake a new core or slightly improved or the same as LionCove? Is NovaLake a different core than the one in Panther? Good question.
- AMDK11
- Post #19,225
- Apr 21, 2025
- Forum: CPUs and Overclocking
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Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

Thanks for the reply. I'll look into that interview for Kitguru.
- AMDK11
- Post #19,221
- Apr 20, 2025
- Forum: CPUs and Overclocking
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Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

LionCove has a very good L2 and a pretty good L1-1.5-D subsystem. Maybe L1.5-D could be a bit better but it's not bad. L3 is a nightmare. If the same team that did the LionCove core took on L3 it would be a lot better. Are there any sources stating which parts of ArrowLake were designed by...
- AMDK11
- Post #19,219
- Apr 20, 2025
- Forum: CPUs and Overclocking
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Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

So LionCove+L2 was designed by one team and L3 by another?
- AMDK11
- Post #19,217
- Apr 19, 2025
- Forum: CPUs and Overclocking
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Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

Yes, I knew about the new design tools that Intel had switched to and that were used in the LionCove project, among others. But is that the main reason?
- AMDK11
- Post #19,215
- Apr 19, 2025
- Forum: CPUs and Overclocking
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Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

Could you please explain to us the reason for the bad PPA of the LionCove core? Is there more to what we already know? ArrowLake L3 36MB, 84 cycles(14.83 ns), 1.02 TB/s Zen5 L3 32MB, 48 cycles(8.44 ns), 1.6 TB/s Zen5 L3 48 cykli (8.44 ns) 1T: 173.6 GB/s nT: 1.6 TB/s LionCove L3 84 cykle...
- AMDK11
- Post #19,213
- Apr 19, 2025
- Forum: CPUs and Overclocking
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Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

The LionCove core itself is a reset if we are to strictly adhere to Intel's tradition in this matter. It is a bit strange that the C&C analyses show that the predictor is also lame in some respects compared to RaptorCove, even though Intel claims that this part is 8x larger in some respects...
- AMDK11
- Post #19,133
- Mar 23, 2025
- Forum: CPUs and Overclocking
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Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

Chips and Cheese:
- AMDK11
- Post #15,621
- Oct 25, 2024
- Forum: CPUs and Overclocking
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Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

In the case of Skymont, it is more difficult for me to recognize the structures. I found the description, but it looks like someone confused Front-end with Back-end (I think). In ArrowLake's LionCove variant, there is a larger space between the lower half of L2 and the upper half of L2, so...
- AMDK11
- Post #15,057
- Oct 22, 2024
- Forum: CPUs and Overclocking
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Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

Delete
- AMDK11
- Post #15,055
- Oct 22, 2024
- Forum: CPUs and Overclocking
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Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

I didn't forget. L2 3MB is the lion's share of LionCove core. You can clearly see that in ArrowLake it is 512KB(0.5MB) bigger than the variant in LunarLake(L2 2.5MB).
- AMDK11
- Post #15,053
- Oct 22, 2024
- Forum: CPUs and Overclocking
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Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

Including larger Front-End, 8x wider predictor, 8-Wide decode, L1-I 64KB, UOP Cache(L0) 5250, Queue 192, ROB 576, Branch Order Buffer 180, Scheduler FP 114 and PRF ~400, Scheduler INT 97 and PRF 290, Execution units on 10 (4x FP + 6x ALU) ports instead of 5 (3x FP/ALU + 2x ALU)...
- AMDK11
- Post #15,050
- Oct 22, 2024
- Forum: CPUs and Overclocking
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Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

Lower clock speeds, densely packed Skymont core logic, smaller structures including buffers. There is no great philosophy here. See on Zen4c compared to Zen4 while maintaining the same IPC, the surface area of Zen4c is much smaller(-34%). The same was done with Skymont, plus less extensive core...
- AMDK11
- Post #14,827
- Oct 18, 2024
- Forum: CPUs and Overclocking
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Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

Apple in Mx and ARM adds a total of 8 ALUs, gaining a significant IPC increase for INT, but in your opinion Skymont adds 2x more for no reason? This has absolutely no impact on the IPC increase for Integer (sarcasm) :D Core: Crestmont Skymont Integer...
- AMDK11
- Post #14,825
- Oct 18, 2024
- Forum: CPUs and Overclocking

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