Note that starting with Zen5, the TSVs don't go on the CCD. The CCD is face down on top of the cache chiplet, so no holes need to be drilled through its substrate. They just need to add vias and pads through the metal layers for the interconnect, and these don't need extra manufacturing steps...
No. Because AMD cannot spend more money today to have more chiplets with 3D cache. The lead time for increasing capacity is measured in years, plural. For all intents and purposes, for the entire Zen 5 generation they have a fixed amount of chiplets with the added cache, they already know how...
The integration capacity is still limited. AMD keeps buying more capacity every generation, but it's slow to build. They cannot put vCache on every chip next year by just spending some money.
There is no engineering effort to gut the FPU, AMD has already designed it to be configurable. You just pick whether you want 256-bit or 512-bit ALUs, and I don't see a world where the die area would be better spent on doubling the SIMD execution width, and not in the GPU.
And again, 256-bit...
To be clear, it will still run 512-bit code, just at half rate. And using 512-bit registers is still a win, because it means frontend can do less work. Just like Zen4.
They really don't need that. 8xZ6c as a single CCX is already an absolutely massive upgrade over PS5, and I frankly think that the additional power and die area above that would be better spent on the GPU. It's okay for console CPUs to not be exactly top of the line, there is less random stuff...
I think I know why it's that big. The MS requirement for the copilot+ sticker is 40 tops of sparse fp16, right? 8 CU of RDNA4 hits that at ~2.5GHz.
They are probably using the GPU as the AI accelerator. This way they are at least not wasting any silicon on an accelerator that's never used.
Yes, but among people not you there is variability in temperatures, power supply and silicon quality. All of that influences stability, and if they push the voltages down some marginal ones start to become unstable and this is a huge problem for their business.
When you UV, you are extracting...
Except when we want range? In FP types, you trade off range and precision. Takum decided that 10^77 was both desperately needed, and enough for everybody. I find both of those arguments specious.
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