Discussion Speculation: Zen 4 (EPYC 4 "Genoa", Ryzen 7000, etc.)

[Vattila]

Except for the details about the improvements in the microarchitecture, we now know pretty well what to expect with Zen 3.

The leaked presentation by AMD Senior Manager Martin Hilgeman shows that EPYC 3 "Milan" will, as promised and expected, reuse the current platform (SP3), and the system architecture and packaging looks to be the same, with the same 9-die chiplet design and the same maximum core and thread-count (no SMT-4, contrary to rumour). The biggest change revealed so far is the enlargement of the compute complex from 4 cores to 8 cores, all sharing a larger L3 cache ("32+ MB", likely to double to 64 MB, I think).

Hilgeman's slides did also show that EPYC 4 "Genoa" is in the definition phase (or was at the time of the presentation in September, at least), and will come with a new platform (SP5), with new memory support (likely DDR5).

What else do you think we will see with Zen 4? PCI-Express 5 support? Increased core-count? 4-way SMT? New packaging (interposer, 2.5D, 3D)? Integrated memory on package (HBM)?

Vote in the poll and share your thoughts!

 

[moinmoin]

I'd rather they simply don't have the engineering and advanced packaging capabilities needed.

To me it seems Intel does have some excellent packaging tech, but too little exchange between design and packaging teams for that to lead to sustainable and ideally competition increasing products. Lakefield and its premature end of availability being the case in point.

 

[Exist50]

To me it seems Intel does have some excellent packaging tech, but too little exchange between design and packaging teams for that to lead to sustainable and ideally competition increasing products. Lakefield and its premature end of availability being the case in point.

Intel currently has no answer to HBI, though, which seems to be where the real focus is. If anything, Foveros logic stacking seems like a waste. Even Intel's own products appear to be using Foveros as just a CoWoS competitor. That said, TSMC's HBI capacity seems quite low for now. It will be much more interesting to see what the state of the industry is in a few years once the tech has proliferated. Seems likely that AMD will move all L3 to a stacked die once they have the capacity. N3 and N2 wafer prices vs SRAM scaling provide quite some motivation.

 

[BorisTheBlade82]

Exactly!
Intel was rather early to market with Foveros and EMIB with Lakefield and even KBL-G. But to my knowledge they have absolutely nothing comparable to SoIC AKA Hybrid Bonding.

 

[Exist50]

Exactly!
Intel was rather early to market with Foveros and EMIB with Lakefield and even KBL-G. But to my knowledge they have absolutely nothing comparable to SoIC AKA Hybrid Bonding.

They have "Foveros Direct", as they call it, on the roadmap, nominally for 2023. But as of today, AMD/TSMC have products, while Intel has powerpoints. EMIB was a very good move, but their approach to Foveros was clearly a mistep.

Anyway, in the context of a Zen 4 thread, not much more to say on this topic. Very early days yet for hybrid bonding.

 

[jpiniero]

ASUS ROG laptop with AMD Ryzen 9 7945HX3D CPU has been listed by retailers - VideoCardz.com

AMD 3D V-Cache coming to laptops? AMD and ASUS might be working on a new system featuring Ryzen 7000X3D laptop series. It seems that ASUS is working on a new gaming laptop, and various sources have recently started mentioning it. The laptop is the ROG STRIX SCAR 17, identified by the product...

videocardz.com

Ooh, Zen 4D might be coming to gaming laptops.

And here's the official announcement:

AMD Announces Ryzen 9 7945HX3D: Ryzen Mobile Gets 3D V-Cache

www.anandtech.com

Only the 7945X3D it seems.

 

[eek2121]

 

[gdansk]

View attachment 83659

I'm sure it's a murder machine but wouldn't a gaming laptop be better served by a 8 core + 3D cache part? No possibility of bad scheduling, theoretically cheaper.

 

[moinmoin]

I'm sure it's a murder machine but wouldn't a gaming laptop be better served by a 8 core + 3D cache part? No possibility of bad scheduling, theoretically cheaper.

Sure. But the competition is pushing 10+ "cores" so AMD marketing needs more than 8 cores for the premium part that 7945HX3D is...

 

[Abwx]

Sure. But the competition is pushing 10+ "cores" so AMD marketing needs more than 8 cores for the premium part that 7945HX3D is...

They can still release a 8C part later, but that would still require the same big GPU to make sense since its gaming perfs are within 2-3% or so of a 7945X3D, eventually with a 4080 GPU if there s any significant advantage compared to a non X3D 8C CPU.

 

[eek2121]

I'm sure it's a murder machine but wouldn't a gaming laptop be better served by a 8 core + 3D cache part? No possibility of bad scheduling, theoretically cheaper.

Not for folks like me with productivity workloads that can use more cores. Also, some games can use more than 8 cores. The non-X3D chiplet will also clock slightly faster, so some games will run better on that.

 

[Mopetar]

Only the base clock is higher in the notebook v-cache chip. Both are listed as having the same boost, though there may be some devils in the finer details.

An 8-core probably makes more sense for more people, but the 16-core CPU is going to generate more profit. Going from an 8-core to a 16-core part requires AMD spending an extra $15 (or whatever the cost may be) on another chiplet.

If they offer both variants right away, fewer people jump on the 16-core for ~$200 more. Since both are going to be limited by v-cache chiplets there's no reason to launch both.

 

[coercitiv]

I'm sure it's a murder machine but wouldn't a gaming laptop be better served by a 8 core + 3D cache part? No possibility of bad scheduling, theoretically cheaper.

Gamers would indeed be better served by the 8-core + 3D. The argument about higher clocks of the non-3D chiplet does not hold water in the mobile space, here you need the absolute best CPU efficiency because every watt spared on the CPU can be used by the GPU.

That being said, the 16-core is more alluring for people with money to spend, and more importantly will look a lot better in benchmarks. This flagship alone will sell more value oriented mobile gaming AMD CPUs than any marketing and/or sales campaign.

 

[BorisTheBlade82]

I don't really know, how credible Xino is, but he/she posted a Core to Core latency chart for Phoenix 2 in order to prove that big and small cores sit on the same CCX.
As it is a protected 'X', I do not want to post a screenshot here. But latencies are indeed rather uniform with 25 to 32ns at 3.2 GHz - although a bit on the high side for my liking compared to Rembrandt.
For comparison:

AMD's Ryzen 9 6900HS Rembrandt Benchmarked: Zen3+ Power and Performance Scaling

www.anandtech.com

 

[DisEnchantment]

I don't really know, how credible Xino is, but he/she posted a Core to Core latency chart for Phoenix 2 in order to prove that big and small cores sit on the same CCX.
As it is a protected 'X', I do not want to post a screenshot here. But latencies are indeed rather uniform with 25 to 32ns at 3.2 GHz - although a bit on the high side for my liking compared to Rembrandt.
For comparison:

AMD's Ryzen 9 6900HS Rembrandt Benchmarked: Zen3+ Power and Performance Scaling

www.anandtech.com

The PHX2 values are reported at 3.2 GHz vs stock 6900HS.

 

[BorisTheBlade82]

The PHX2 values are reported at 3.2 GHz vs stock 6900HS.

Sure. But even then, it is a bit on the high side, considering it to be a CCX consisting of only 6 cores.

 

[BorisTheBlade82]

The PHX2 values are reported at 3.2 GHz vs stock 6900HS.

After some re-calculation: Yep, you are right. I forgot, that a 6900HS was able to boost up to 4.9 GHz. So 25ms * 3.2 GHz / 4.9 GHz = 16.3ms.
Sounds pretty reasonable.

 

[igor_kavinski]

Robert Hallock to Leave AMD After 12 Years

Surprise surprise!

Robert Hallock Joins Intel As Senior Director of Technical Marketing After A Decade At AMD

In a twist of events, AMD's ex-official Robert Hallock joins Intel as a Senior Director of Technical Marketing.

wccftech.com

 

[bakyt115]

is it possible for zen4c or zen5c decrease pipeline depth sins core is more compact?

 

[Thibsie]

is it possible for zen4c or zen5c decrease pipeline depth sins core is more compact?

Not AFAICT.

 

[Tuna-Fish]

is it possible for zen4c or zen5c decrease pipeline depth sins core is more compact?

In principle it's possible to decrease pipeline depth when you are accepting lower clocks, but that would be a massive architectural change that requires tons of work, not something they can automate, and AMD's plan for the "c" series seems to be to minimize manual work and just resynthesize the same core with different rules.

 

[Mopetar]

They could conceivably move from something that uses 3 stages down to a 2-stage design, but the amount of effort required for the transistors saved is unlikely to be worthwhile.

I think you'd have to build around a shorter pipeline from the start, similar to what Apple has done. If we were to see something like that it's more likely to occur in a major revision as opposed to incremental architecture upgrades.

AMD has also been putting a lot of work into their branch prediction. The main downside of longer pipelines is the extra latency added along with anything else needed to correct for branch misperception. Having an extra stage that could be eliminated isn't as much of an issue if you are making correct predictions more often than otherwise.

 

[bakyt115]

I remember transition from cortex a72 to cortex a73 shorter pipeline gives some benefits.

The ARM Cortex A73 - Artemis Unveiled

www.anandtech.com

 

[ZGR]

Ok, I am really impressed with how fast memory support is being improved for Ryzen 7000.

When was last time AMD caught up to Intel with high speed memory support?

 

[A///]

hardly makes a difference the way amd handles memory.

 

[A///]

threadripper 7000 leaks.