In addition, the SR power consumption was far greater than Genoa. Since some of these don't show it, I will use Phoronix test, 386 for Genoa vs 586 for SR. Not even close. So Genoa wins overall by 25% and using 50% less power.Oh, and for similar cores.... so 64 cores gets 615 and 60 cores of SR get 495. So at the closest we can bench, its 25% faster for for 7% more Genoa cores.
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I got ~29% lower capacitance, If 3GHz is the turning point.It's freq/voltage curve - not perf/w. Dense core has less static and dynamic power variables so it's more efficient at given voltage. Zen4 &c efficiency switch point is somewhere around 3GHz, which quick calculation gives approximation that it's combined dynamic/static capacitance at that 3GHz is about 2/3 of regular core.
Cores can be clocked independently. So they need to make good driver that OS knows where to put priority tasks.Amd already has good onchip PWM.I got ~29% lower capacitance, If 3GHz is the turning point.
My question is from where did you get that It is at 3GHz?
3GHz is rather low If you ask me.
8C16T 7840Hs can keep 4GHz at 54W in Prime95. Notebookcheck.net
8C16T Z1 Extreme can keep 3.5GHz at 31-33W in CB R15, there was sadly no Prime95. Notebookcheck.net
What I want to know is If 4+8 Strix Point limited to 45W will clock below or above 3GHz in CB R23 or Prime95.
If It can clock above, then those dense cores will be less efficient than normal ones, so Strix Point will not be ideal set at >45W TDP.
On the other hand, at low TDP It could be more efficient in highly parallel tasks.
I am talking about fully loaded cores, for example during CB R23.Cores can be clocked independently. So they need to make good driver that OS knows where to put priority tasks.Amd already has good onchip PWM.
I don't think they will push dense cores above efficiency point.
I would still not be worried. 4 cores can suck lots of juice at high clocks. They can use more than half of allowed PPW @88 W.I am talking about fully loaded cores, for example during CB R23.
Of course, during lightly threaded loads 1-4 threads, standard cores should have priority.
If OEMs set TDP at 80W for example, which they do with some Phoenix gaming laptops, then there is more than enough juice to clock past 3.6GHz.
For example: 12C24T 7845HX manages 4533MHz with 118W package power during Prime95 and that one uses 5nm process and is chiplet based.
But maybe Zen5C is better optimized and the turning point is higher than 3GHz.
Voltage being 20% higher with 2/3 the capacitance this lead to 0.66 x (1.2)^2 = 0.95x the power, that is a non significant power saving of 5%, if capacitance is 29% lower then there s no perf/watt advantage at all, the dense core will use 2% more power.I got ~29% lower capacitance, If 3GHz is the turning point.
My question is from where did you get that It is at 3GHz?
Phoenix can keep 4350MHz at 82W during Prime95. 4 cores should manage similar clock at 45W, but is this approach better?I would still not be worried. 4 cores can suck lots of juice at high clocks. They can use more than half of allowed PPW @88 W.
Again, that's the exact scenario that will disproportionately benefit the architecture that gains a massive non-SMT uplift at the expense of SMT yield, except that's not what the leak is showing.
At this point, I think you might be trolling me because based on your posting history (this is a complement) I don't see how this could possibly be going over your head for so long now (this isn't). You aren't engaging. You're just repeating yourself despite the fact that the thing you're repeating goes against your claim.
One more time: If the non-SMT threads (which are assigned first) have a massive uplift while SMT threads (which are assigned later) actually regress, and you're talking about an application with a semi-hard physical limit to thread scaling due to additional threads not being able to perform any meaningful work after a point, when comparing two CPUs that go past that point we're talking about a task that disproportionately benefits the CPU that relies less on SMT.
Therefore if the uplift of 256T Z5 vs 256 Z4 in Cinebench is only 15%, then you should expect a much lower uplift in consumer parts. And that just doesn't sound realistic.
Efficiency switch point seems here to be about 2.5GHz. A bit lower point than with server C-only CCD, probably resulting from dense and regular core sharing ring and power delivery making C-part little handicapped. Still achieving 20% power saving in ~5W soc tdp levels, which isn't small achievement.We have straight up power curves too, finally decided to stop being lazy and just search it up lol
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Maybe it is not, at least the diagram does not look like that.
- "2 basic block fetch" --> Does this mean 2x fetch and decode blocks akin to Tremont?
I would say the next evolution of the C cores."Dense option" == C variant, e.g. Zen 4C.
"Low power core option" == E variant (new core, similar to Intel E-cores for Efficiency), so we'll get Zen 5E?
Any thoughts on this?
Cloud might very well still want native 512 bit if they have the need from a crypto perspective.Maybe it is not, at least the diagram does not look like that.
Anybody has a clue what this is?
I would say the next evolution of the C cores.
The current C cores seem like a reaction to a competitor or opportunistic development. But it is an adaptation of the standard core only, save shaving of L3.
With such a fat Zen 5 core, it makes sense now to use a more efficient and less wasteful design and purpose built architecture for the C variants.
For cloud it would makes sense to use a 256b AVX pipe instead of a full blown 512b pipe for instance. Then physical design as well should target the density and frequency sweet spots not just port a high frequency physical implementation to a dense library. Then they could tailor the OOO structures to a certain throughput instead of going for the last drop of ST perf they can squeeze from the architecture.
Thats true, those HTTPS/certs/signatures/hashing/checksum stuffs are important. But wondering if the double pumped AVX512 version would be enough since there are many specific instructions for those.Cloud might very well still want native 512 bit if they have the need from a crypto perspective.
Maybe it is not, at least the diagram does not look like that.
Anybody has a clue what this is?
I would say the next evolution of the C cores.
The current C cores seem like a reaction to a competitor or opportunistic development. But it is an adaptation of the standard core only, save shaving of L3.
With such a fat Zen 5 core, it makes sense now to use a more efficient and less wasteful design and purpose built architecture for the C variants.
For cloud it would makes sense to use a 256b AVX pipe instead of a full blown 512b pipe for instance. Then physical design as well should target the density and frequency sweet spots not just port a high frequency physical implementation to a dense library. Then they could tailor the OOO structures to a certain throughput instead of going for the last drop of ST perf they can squeeze from the architecture.
A certain someone on these forums is saying H1 2024. November might be when the X3D parts are released, to rain on Intel's Arrow Lake parade.could mean that zen5 launches around the same time as zen3. november.
no.I feel like the E cores are in response to Intel
They don't need to, ARL-S is a nonfactor.November might be when the X3D parts are released, to rain on Intel's Arrow Lake parade.
We'll see. I just have a hard time believing that Intel can get totally knee capped by Zen 5. They countered Zen 3 with Alder Lake and Zen 4 with Raptor Lake. While not great responses, they at least prevented themselves from being thoroughly embarrassed. The 13600K is still a nice gaming CPU at its price point. The 15600K may not beat the Zen 5 equivalent but it should still sell in good numbers.They don't need to, ARL-S is a nonfactor.
Yea or so I thought half a year ago.I just have a hard time believing that Intel can get totally knee capped by Zen 5
It doesn't sell.The 13600K is still a nice gaming CPU at its price point.
This won't sell either.The 15600K may not beat the Zen 5 equivalent but it should still sell in good numbers.
In the US, maybe not that well. But the rest of the world doesn't even know that AMD exists (or rather, the shopkeepers prefer to stick with Intel). I see that the 7800X3D is selling remarkably well and outselling it is...Zen 3!It doesn't sell.
Desktop AMD sells well in most of Europe. Just maybe not where you live.In the US, maybe not that well. But the rest of the world doesn't even know that AMD exists (or rather, the shopkeepers prefer to stick with Intel). I see that the 7800X3D is selling remarkably well and outselling it is...Zen 3!
In the US, maybe not that well. But the rest of the world doesn't even know that AMD exists (or rather, the shopkeepers prefer to stick with Intel). I see that the 7800X3D is selling remarkably well and outselling it is...Zen 3!