It literally is.Who doesn't want Zen 5 to be a behemoth?
like what?But after all the AMD hype trains who can believe it without evidence
that's not how you design anything lolAnd it is especially hard to believe when they don't really need the rumored performance to beat their competition. 20% IPC seems possibly more than needed.
What are you talking about? adroc just killed my expectation that AMD finally would increase the link speed (per cycle, I know I know) with Zen 5. I'm seriously bummed here, lol.AMD hype trains
Impeccable reasoning.That's like the future of all CPU cores, not just AMD.
Dark si is cheapo, everything else is not.
N3/N2/onwards nodes are rich in logic scaling and nothing ever else.
Can't spam SRAM, can't scale the frequency anymore so the only choice remains.
It's literally why Phoenix, LNC and Zen5 look oddly similar.Impeccable reasoning.
Not SRAM, but it won't always be the only player in the game at that latency.Can't spam SRAM, can't scale the frequency anymore so the only choice remains.
I've been burnt on so many SRAM/DRAM replacement hopiums that I'd rather not say anything like that ever.but it won't always be the only player in the game at that latency.
In the long run, not really. Intel's big cores after RWC are looking to be really good too.20% IPC seems possibly more than needed.
It goes way back. People hyped K10 to the moon. Or more recently the claims Zen 2 would be 5GHz. Or bondrewd's misinterpretation of RDNA3.It literally is.
That's like the future of all CPU cores, not just AMD.
Dark si is cheapo, everything else is not.
N3/N2/onwards nodes are rich in logic scaling and nothing ever else.
Can't spam SRAM, can't scale the frequency anymore so the only choice remains.
like what?
that's not how you design anything lol
They'll cut it in half if you don't stop talking about it.What are you talking about? adroc just killed my expectation that AMD finally would increase the link speed (per cycle, I know I know) with Zen 5. I'm seriously bummed here, lol.
They're pretty good but I wonder if they're good enough.Intel's big cores after RWC are looking to be really good too.
Bingo.20% seems like the floor to me given what AMD accomplished with Zen 3 and what Zen 5 is rumored to be.
Yea it was a rather solid design TLB bugs aside and in itself is a byproduct of like there dead K9 attempts.It goes way back. People hyped K10 to the moon
Only one dumb youtuber did that.Or more recently the claims Zen 2 would be 5GHz.
RDNA3 still works as well as it should in headless compute.Or bondrewd's misinterpretation of RDNA3.
They're not projections, the Si has sampled and perf targets are now final.Sometimes reality does not end up matching unsourced performance projections.
That's my bad you had made that clear previously.They're not projections, the Si has sampled and perf targets are now final.
Oh don't get me wrong I've not much hope (especially in DRAMs case - it's a frickin zombie 😂), but if SRAM has run into a scaling wall then the industry has no choice but to take replacements seriously.I've been burnt on so many SRAM/DRAM replacement hopiums that I'd rather not say anything like that ever.
So yea, core bloat is the way forward.
Ehhh gonna keep my hopium in "SRAM on CFETs scaling in like early 2030s" instead.but if SRAM has run into a scaling wall then the industry has no choice but to take replacements seriously.
Yea but SOT-MRAM has so far been a meme, not a product, and I don't think it's anywhere close to being a product.VG SOT MRAM can offer serious area advantages is no small incentive there too.
Yea the ideal scenario but that's so unlikely to happen.As long as they could provide adequate power the number of cores per socket could easily increase 50-70% at the same L2/L3 densities in the same space.
From what I can gather base SOT MRAM doesn't seem worth developing vs the VG SOT variant.Yea but SOT-MRAM has so far been a meme, not a product, and I don't think it's anywhere close to being a product.
Yea I've seen the paper, but given thet usual pattern of "imec talks, fabs do not" it's a fair while away from hitting relevant process nodes, unfortunately.Imec demonstrated VG SOT MRAM in February (link) - they don't seem to do that just for the sake of it given their previous demonstrations of future transistor tech like forksheet.
Yea a by far more feasible choice, but either way that's years and years away and we need more SRAM now. Or yesterday, really.Another thing being looked at by Imec is nanowire VFETs for SRAM (link), so there's that too I guess.
I have posted links where Genoa set all sorts of world records, and they say its the fastest. I have posted my own benchmark results and said the same. But there seems to be no love on this forum for Genoa. I hope Zen 5 blows Zen 4 away, but I am more than happy with my 3 Genoa chips.They're pretty good but I wonder if they're good enough.
Bingo.
Yea it was a rather solid design TLB bugs aside and in itself is a byproduct of like there dead K9 attempts.
Only one dumb youtuber did that.
RDNA3 still works as well as it should in headless compute.
Still a cursed piece of IP.
They're not projections, the Si has sampled and perf targets are now final.
It really does, but 500W socket power bites.I hope Zen 5 blows Zen 4 away
Genoa is still a very-very impressive offering, but per-core/per-thread perf of Turin is something else.but I am more than happy with my 3 Genoa chips.
I have all my 7950x chips set to 142-150 watts (depending on BIOS) and my 3 Genoa chips are 320 watt. So I have 608 Zen 4 cores(threads) running at an average of ~4 ghz 100% full load for 1710 watts total. Just the 2 9554's are running a total of 256 threads@3.5 ghz for 640 watts ! 160 more threads @ 4.5 ghz full load. SR/Raptor lake can not touch the performance or the perf/watt. Even at 500 watts, it Zen 5 is that impressive (>20% IPC over Zen 4 + possible clock upgrade), then who cares about 500 watts for 96-128 cores (192=256 threads) for one chip !It really does, but 500W socket power bites.
Genoa is still a very-very impressive offering, but per-core/per-thread perf of Turin is something else.
Eh, still tricky to cool, in 1U especially.Even at 500 watts, it Zen 5 is that impressive (>20% IPC over Zen 4 + possible clock upgrade), then who cares about 500 watts for 96-128 cores (192=256 threads) for one chip !
It's all loaded in IPC, the clocks were effectively tapped out with Zen4 being a real speed daemon.>20% IPC over Zen 4 + possible clock upgrade
Now that could be, but I have seen several WC solutions that would work great, even at 500 watts, but the noise !!!!. Mine are on these:Eh, still tricky to cool, in 1U especially.
It's all loaded in IPC, the clocks were effectively tapped out with Zen4 being a real speed daemon.
Was trying to remember that name. His writing style has me experiencing some deja vu here lately.Or bondrewd's misinterpretation of RDNA3.
If you want something actually "substantial" out of him, you can go look at at his anime tiddie and hohol poasting twitter feed...
TDevilfish
Or just subtract 20-30% from everything he says, then you are in the right ballpark.
Lmao whatOr just subtract 20-30% from everything he says, then you are in the right ballpark.
Lol, what a deja vu from the Zen 4 rumors: "Zen 3 was 20% - now they got the funding, the 5nm doubles everything, the delay between releases gave them such opportunity!!1!"20% seems like the floor to me given what AMD accomplished with Zen 3 and what Zen 5 is rumored to be.
Zen4 was always high single digits int, low teens total IPC bump.Lol, what a deja vu from the Zen 4 rumors: "Zen 3 was 20% - now they got the funding, the 5nm doubles everything, the delay between releases gave them such opportunity!!1!
I wouldn't call MI300 economical on a good day.AMD is all about making economical stuff
Wroooong because favela/mainstream mobile/edge/Telco segments are served by Compact piles.they will still need to scale it to 4c APUs based on Zen 5