Recent content by Doug S

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    Discussion Apple Silicon SoC thread

    That was M3 (at least that's what I saw reported, I never saw a link to an actual source for that claim) Nevertheless, increasing L1 latency is not in any way equivalent to increasing pipe stages. There are plenty of reasons you might increase cache latency that have nothing to do with...
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    Discussion Apple Silicon SoC thread

    So if Apple is supporting SME now, do they still need their AVX instructions? Do those do anything that SME instructions can't? AFAIK SME requires ARMv9, so does that mean M4 is ARMv9? Maybe it went like this - Apple was not ready to implement ARMv9 yet (and maybe that was dependent on the...
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    Discussion Apple Silicon SoC thread

    If they're increasing pipeline stages it would show up in instruction latencies. You're doing plenty of low level testing on Apple Silicon hardware, have you seen instruction latency increasing? I'm skeptical. I think they're just taking advantage of what the process gives them. When TSMC shows...
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    Discussion Apple Silicon SoC thread

    I'm still not convinced of that. Intel may have originally planned to use N3 (before it was known to be flawed and became known as "N3B") a few years ago when "Intel buying TSMC N3" was on the news - and note that those rumors had Intel getting in AHEAD OF Apple on N3. Which would have happened...
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    Discussion Apple Silicon SoC thread

    If they want to kill off M3 as quickly as possible why did they just release the new MBA two months ago? I think they always want a little distance between MBP and MBA, so the MBA will tend to be upgraded a bit later after the initial surge in sales from the new MBPs. So if they do new Macbook...
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    Discussion Apple Silicon SoC thread

    Given the way they've been ramping clocks the last few years, they'll exceed 5 GHz in two years. At some point I have to think this is going to be problematic for Apple's focus on low power. Curious to see how this does power-wise when running at max clock vs M3.
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    Discussion Apple Silicon SoC thread

    Apple often keeps two generations of a product around so they can have a lower price on the older model, but with M3 being supplanted by M4 so quickly they didn't get many M3 based products out the door. But if they wanted to quickly drop M3 why did they introduce the M3 Macbook Air only two...
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    Discussion Apple Silicon SoC thread

    The reason why they did the compare to M2 instead of M3 is blindingly obvious to anyone who is paying attention. They were announcing iPad Pros, and the previous iPad Pro contained an M2! Why would they compare with the M3, when there never was an M3 iPad Pro? When they do a new Mac Pro or Mac...
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    Discussion Apple Silicon SoC thread

    I remember everyone thought the same thing when they announced a 70% ST gain for A9, then it turned out to actually be 70% faster in real life. A 50% MT gain is trivial, I did the math for it a few posts ago. They only need a single digit IPC gain on the P core, or a low double digit gain on...
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    Discussion Apple Silicon SoC thread

    There is unlikely to be that much interdie variation, certainly not at the level Apple is binning. Apple's speed binning is pretty lax since it is pure pass/fail, so the threshold must be set such that almost every functional die is a pass. They could get at least 10-20% more ST if they binned...
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    Discussion Apple Silicon SoC thread

    Yeah the node that made binning complex for Apple was N3B because it is so bad. N3E is back to normal TSMC yields, where Apple's "bin on defects in large structures" strategy to gain another few percent of usable dies makes sense. It is interesting that they switched from binning on defective...
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    Discussion Apple Silicon SoC thread

    Based on the 'best' scores in GB6 ST Apple gained about 15% from M2 to M3. Apple E cores tend to be worth about 1/3 of a P core, so an 8 core M2 had 5.3 cores vs 10 core M4 having 6 cores, accounting for 12%. From N3E TSMC says you should get 6-7%. If you multiply all that together (can't add...
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    Discussion Apple Silicon SoC thread

    Regarding the Gurman article on using M4, I wonder if his source was the iPadOS 14.5 betas containing indications of iPad 16,x and the T8132. That information was apparently around for a while before Gurman's article, so maybe he doesn't have any actual sources for this beyond that. Others might...
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    Discussion Apple Silicon SoC thread

    I still don't buy it. I saw other reports that Apple was building custom chips for their AI servers. That I could believe. It makes zero sense to install a bunch of Apple Silicon chips just to use the tiny corner that's labeled 'NPU', or the slightly larger piece that's labeled 'GPU', and waste...
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    Discussion Apple Silicon SoC thread

    So if A18P cores are named Mariana we should expect a serious performance regression?
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