Memory capacity is king. Strix Halo + 64GB RAM will beat a 4090 in any AI task if you scale it up sufficiently. And for local LLMs where capacity is by far the biggest bottleneck, it won't even be close.
Strix Halo directly competes for the semi-pro market that is buying 4090s instead of RTX...
Golden Cove client and server appear completely different in die shots, but Raptor Cove and Golden Cove server are indistinguishable. Don't think you can find any Raptor Lake where the AVX-512 isn't fused off.
Well, it's new silicon. Took the server variant Golden Cove cores from Sapphire Rapids, called the Raptor Cove, and improved the e-core implementation a bit.
I generally agree, but I also think eventually you reach a point where a sufficient deficit in ST just makes any advantage in MT irrelevant.
If a product gets 0.9x ST/1.2x MT, that's viable.
But if a product gets 0.66x ST/1.66 MT, that's a really touch sell tbh.
I'd take 8 Zen1 cores over 4...
It doesn't exist in large part because there aren't any good components for it.
The main draw for STH in a Mac Studio type form factor is you can include gobs of unified memory for AI workloads.
The analysis *really* depends on how AMD decides to construct the thing. Strix Point suggests the existence of an 8c Zen5c CCX (assuming its 4+8 config isn't all implemented on one big, shared CCX). It could be that for Strix Halo, there's, for example, an 8 core Zen5c CCX sharing the same die...
It should have around 3x the bandwidth.
That's an assumption, but probably a safe one. Strix Point is 4+8, so 8+8 makes sense for Halo. 16+0 would be a waste of power and die space. But, bear in mind AMD traditionally sacrifices a lot of stuff on the alter of getting parts ready sooner.
I...
Lots of variables. Halo obviously wins all bandwidth bound tasks. Monolithic improves latency but otoh the whole memory subsystem is likely geared towards bandwidth at the expense of latency.
I'm assuming Halo is 8 Zen5 + 8 Zen5c, so in that case 9950X obviously wins all embarrassingly parallel...
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