Highly Confident:
When Reuter reported NV and AMD are going to launch ARM SoC for PC:
My first reaction is NV yeah possible, AMD no way. With full lineup of mobile APU coming namely Sonoma Valley, Kraken Point, Strix Point and Sarlak. What is the point? All the above SoCs almost covers all the performance (from 64-bit to 256-bit LPDDR5x) and price points.
However, when I started a thread for upcoming LPDDR6 here, I think AMD might create new lineup for ARM SoC with LPDDR6, more info below:
I contacted my source, turned up there might have some truths there. Apparently, MS Surface which presumably will upgrade Surface Pro X to Snapdragon X Elite this year. Next year 2025 and later, NV and AMD have won the contract for upcoming Surface X series. PS: And I believe here is the source of Reuter's leaks. If Microsoft going to launch new Surface in 2025, the specs must be better than upcoming Surface Pro X w/ X Elite.......or not? See below:
Highly Speculation
My source insisted that AMD will create custom off-shelf ARM core for Microsoft. They won't be used on standard PC lineup, I actually have different opinion. Below is my speculated lineup:
Let's compare Hawk Point APU with my speculated ARM SoC with 64-bit memory bus:
Highly Confident
When Reuter reported NV and AMD are going to launch ARM SoC for PC:
Advanced Micro Devices also plans to make chips for PCs with Arm technology, according to two people familiar with the matter.
Nvidia and AMD could sell PC chips as soon as 2025
My first reaction is NV yeah possible, AMD no way. With full lineup of mobile APU coming namely Sonoma Valley, Kraken Point, Strix Point and Sarlak. What is the point? All the above SoCs almost covers all the performance (from 64-bit to 256-bit LPDDR5x) and price points.
However, when I started a thread for upcoming LPDDR6 here, I think AMD might create new lineup for ARM SoC with LPDDR6, more info below:
I contacted my source, turned up there might have some truths there. Apparently, MS Surface which presumably will upgrade Surface Pro X to Snapdragon X Elite this year. Next year 2025 and later, NV and AMD have won the contract for upcoming Surface X series. PS: And I believe here is the source of Reuter's leaks. If Microsoft going to launch new Surface in 2025, the specs must be better than upcoming Surface Pro X w/ X Elite.......or not? See below:
Highly Speculation
My source insisted that AMD will create custom off-shelf ARM core for Microsoft. They won't be used on standard PC lineup, I actually have different opinion. Below is my speculated lineup:
Let's compare Hawk Point APU with my speculated ARM SoC with 64-bit memory bus:
Hawk Point | ARM 64-BIT MC | X Elite | Apple's M3 | Lunar Lake | |
---|---|---|---|---|---|
Node | N4 | ? | N4P | N3B | N3B + N6 |
Die Size | 178 mm2 | ? | ~171 mm2 | ~146 mm2 | ? |
Memory Supported | 128-bit LPDDR5X-7500 | 64-bit LPDDR6-12800 | 128-bit LPDDR5X-8533 | 128-bit LPDDR5-6400 | 128-bit LPDDR5X-8533 |
Memory BW | 120 GB/s | 102 GB/s | 136 GB/s | 100 GB/s | 136 GB/s |
CPU | Zen 4 8P/16T | Cortex 6-8 P? | 12P Oryon | 4P + 4E | 4P + 4E |
GPU | RDNA3 12CU | RDNA 8CU ? | Adreno | 1280 ALU | ARC 8XE |
FP32 | 4.3 TF | ~ 4 TF | 4.6 TF | 4.1 TF | 3.8 TF |
AIE (TOPS) | 16 | ? | 45 | 18 | 45 |
- I don't know how the core arrangement be. Let's assume 6-8 cores with RDNA 12CU.
- The memory bandwidth of 64-bit LPDDR6 is a bit slower than Hawk Point, that's why I estimate core count to between 6-8 cores. Remember Zen4 comes with HT while ARM likely won't support HT.
- And why don't AMD create x86 version of APU to fit the same memory bandwidth? Cause Hawk Point exist, AMD already has full lineup of solution from top to bottom. BTW, Kraken Point and Sonoma Valley will replace Hawk Point in 2026 for mobile market. Thus, there is no point to create another x86 SoC with similar bandwidth. And that's my reason why AMD would use ARM core to create new lineup with LPDDR6. Also, ARM's die area is smaller than Zen 5 (pending confirmation) and definitely more power efficient. It is possible AMD will support 9W fanless design with ARM SoC.
Strix Point | ARM 128-BIT MC | Sarlak6 256-BIT | |
---|---|---|---|
Node | N4P | N3P ? | N3P + N3E |
Die Size | 225 mm2 | ? | ? |
Memory Supported | 128-bit LPDDR5X-8533 | 128-bit LPDDR6-12800 | 256-bit LPDDR6-12800 |
Memory BW | 136 GB/s | 205 GB/s | 410 GB/s |
CPU | 4 x Zen5 + 8 x Zen5c | 12-16 P ? | 16 x Zen6 |
GPU | RDNA3.5 16CU | RDNA 24CU ? | RDNA5? 40CU + 32MB IC |
FP32 | ~ 6.1 TF | ~ 9.2 TF | ? |
AIE (TOPS) | 48 | ? | 48 |
Speculated Mobile Roadmap | Memory Bus | 2026 DDR5/LPDDR5 | 2026 LPDDR6 | Memory Bus | ||
---|---|---|---|---|---|---|
Ultimate Compute | 128-bit DDR5 | Zen 6 / N3P / 16C + X3D | ||||
Elite Experiences | 256-bit LPDDR5X 192-bit LPDDR5X | Sarlak Zen 5? / N4P + N3E / 16C + RDNA3.5 40CU + 50 TOPS | Sarlak6 Zen 6 / N3P + N3E / 16C + RDNA5? 40CU + >50 TOPS | 256-bit LPDDR6 192-bit LPDDR6 | ||
Premium | 128-bit LPDDR5X | Strix Point Zen 5 / N4P / 12C + RDNA3.5 16CU + 50 TOPS | ARM 128-bitMC / 16P + RDNA 24CU + >50 TOPS ? | 128-bit LPDDR6 | ||
Mainstream | 128-bit LPDDR5X | Kraken Point Zen 5 / N4P / 8C + RDNA3.5 8CU + TOPS | ARM 64-bitMC / 10c + RDNA 12CU + >50 TOPS ? | 64-bit LPDDR6 | ||
Everyday | 64-bit LPDDR5X | Sonoma Valley Zen 5c / SF4X / 4C + RDNA3.5 4CU |
Highly Confident
- Zen 6 is pretty much confirmed to use N3P and feature 16-core into one die area. And I believe 16-core Zen6 will pair with Sarlak iGPU to utilize LPDDR6 with higher memory bandwidth.
- 32-core Zen 6C (that's the term AMD refer) on N2 process. There's no difference in the architecture, only in the libraries and floorplan used. And Zen 6C would be used to counter upcoming NovaLake-S.
- Since DDR6 is delayed, NVL-S will support 128-bit DDR5. Based on timings, it should support up to DDR5-8000. And that might be the speed AMD would use to support Zen 6C, that's mean AM5 platform will live for another generation.
Model | Zen 4 Cores | Speed | TDP | GB6 1T | Perf Per Clock | GB6 MT | Perf Per Core | ||
---|---|---|---|---|---|---|---|---|---|
R9 7950X | 16 | 5.7 GHz | 170 W | 2937 | 515 | ||||
R7 7700X | 8 | 5.4 GHz | 105 W | 2906 | 538 | ||||
R7 7745HX | 8 | 5.1 GHz | 55 W | 2686 | 527 | ||||
R9 7940HS | 8 | 5.2 GHz | 35 - 54 W | 2475 | 475 | 11670 | 1459 | ||
R7 7840U | 8 | 5.1 GHz | 28 W | 2102 | 412 | 8762 | 1095 | ||
Zen 5 Cores | |||||||||
R9 8950H ? | 4P + 8E | 35 W | |||||||
R7 8950U ? | 4P + 8E | ||||||||
Apple's M3 | 4P + 4E | 4.06 GHz | 20 W | 3084 | 760 | 11564 | 1445 | ||
M2 | 4P + 4E | 3.49 GHz | 20 W | 2634 | 755 | 9753 | 1219 | ||
X Elite | 12P | 4 GHz | 23 W | 2780 | 695 | 14029 | 1169 |
Cortex-X3 | Cortex-X4 | Cortex-X5 | Cortex-X6 | |
---|---|---|---|---|
SoC Launch Date | Q4 2022 | Q4 2023 | Q4 2024 | Q4 2025 |
SoC | SD 8 Gen 2 | SD 8 Gen 3 | D9400 | D9500 |
Node | N4 | N4P | N3E | N3P |
Clock Speed | 2.0 - 3.2 GHz | 3.3 GHz | ||
L2 Cache | 1 MB | 2 MB ? | ||
L3 Cache | 8 MB | 12 MB | ||
ROB | 320 | 384 | ||
Decode | 6 | 10 | ||
Int ALU | 6 | 8 | ||
Max Memory Speed | 64-bit LPDDR5X-8400 | 64-bit LPDDR5X-9600 | 64-bit LPDDR6-12800 ? | |
Memory BW | 67 GB/s | 77 GB/s | 102 GB/s | |
GB6 1T | ~ 2043 | ~ 2277 | ~ 2700 ? |
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