Discussion Apple Silicon SoC thread

[Eug]

M1
5 nm
Unified memory architecture - LP-DDR4
16 billion transistors

8-core CPU

4 high-performance cores
192 KB instruction cache
128 KB data cache
Shared 12 MB L2 cache

4 high-efficiency cores
128 KB instruction cache
64 KB data cache
Shared 4 MB L2 cache
(Apple claims the 4 high-effiency cores alone perform like a dual-core Intel MacBook Air)

8-core iGPU (but there is a 7-core variant, likely with one inactive core)
128 execution units
Up to 24576 concurrent threads
2.6 Teraflops
82 Gigatexels/s
41 gigapixels/s

16-core neural engine
Secure Enclave
USB 4

Products:
$999 ($899 edu) 13" MacBook Air (fanless) - 18 hour video playback battery life
$699 Mac mini (with fan)
$1299 ($1199 edu) 13" MacBook Pro (with fan) - 20 hour video playback battery life

Memory options 8 GB and 16 GB. No 32 GB option (unless you go Intel).

It should be noted that the M1 chip in these three Macs is the same (aside from GPU core number). Basically, Apple is taking the same approach which these chips as they do the iPhones and iPads. Just one SKU (excluding the X variants), which is the same across all iDevices (aside from maybe slight clock speed differences occasionally).

EDIT:



M1 Pro 8-core CPU (6+2), 14-core GPU
M1 Pro 10-core CPU (8+2), 14-core GPU
M1 Pro 10-core CPU (8+2), 16-core GPU
M1 Max 10-core CPU (8+2), 24-core GPU
M1 Max 10-core CPU (8+2), 32-core GPU

M1 Pro and M1 Max discussion here:

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M1 Ultra discussion here:

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M2 discussion here:

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Second Generation 5 nm
Unified memory architecture - LPDDR5, up to 24 GB and 100 GB/s
20 billion transistors

8-core CPU

4 high-performance cores
192 KB instruction cache
128 KB data cache
Shared 16 MB L2 cache

4 high-efficiency cores
128 KB instruction cache
64 KB data cache
Shared 4 MB L2 cache

10-core iGPU (but there is an 8-core variant)
3.6 Teraflops

16-core neural engine
Secure Enclave
USB 4

Hardware acceleration for 8K h.264, h.264, ProRes

M3 Family discussion here:

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[FlameTail]

The M3 Max CPU is the best mobile CPU out there.

This beast:

 

[junjie1475]

still want to know how he got that...it would have to come from inside Apple because there's no way reverse engineering can get that level of detail.

Late reply, but you can. I helped them do the reverse engineering on the A17 pro, I used various ways to measure the size of different structures and identify different types of functional units. junjie1475/iOS-microbench (github.com) Here is the code I used to reverse engineer the A17 Pro. But indeed there are a few obstacles to reverse engineering the architecture on the iOS platform, for example, you only can obtain the cycle counter and instructions counter on iOS, so you can't do some other interesting tests like branch prediction penalty/accuracy, cache miss...etc
Also, Apple never publicized any of its microarchitecture details. Perhaps I should write a blog on how to do those stuff.

 

[FlameTail]

Late reply, but you can. I helped them do the reverse engineering on the A17 pro,

Hey! You are the Junjie that Geekerwan mentioned in their A17 Pro video

I used various ways to measure the size of different structures and identify different types of functional units. junjie1475/iOS-microbench (github.com) Here is the code I used to reverse engineer the A17 Pro. But indeed there are a few obstacles to reverse engineering the architecture on the iOS platform, for example, you only can obtain the cycle counter and instructions counter on iOS, so you can't do some other interesting tests like branch prediction penalty/accuracy, cache miss...etc

Very clever.

Also, Apple never publicized any of its microarchitecture details. Perhaps I should write a blog on how to do those stuff.

Perhaps you should, indeed.

 

[junjie1475]

Hey! You are the Junjie that Geekerwan mentioned in their A17 Pro video

Yes , I also helped them to test branch prediction and core-to-core latency on m3, though not many had found it lol.

Very clever.
View attachment 96628

We all Stand on the shoulders of giants.

Perhaps you should, indeed.

Yes, but it takes time. Maybe I should wait for the next Apple silicon release.

 

[poke01]

junjie1475, do you have any idea why the P core is named Coll?

As far I am aware Coll is also the codename for the SoC itself. Normally, Apple uses a codename like Everest, Firestorm etc for their P cores and not the SoC name.

Yes, but it takes time. Maybe I should wait for the next Apple silicon release.

Maybe, Anandtech can hire you? Its been a long time since Anandtech had a mobile arch deepdive. You are more than qualified.

 

[junjie1475]

junjie1475, do you have any idea why the P core is named Coll?

As far I am aware Coll is also the codename for the SoC itself. Normally, Apple uses a codename like Everest, Firestorm etc for their P cores and not the SoC name.

Maybe Apple just changed its naming convention, maybe they decided to stop exposing their microarchitecture name...etc I don't know. Also, apple names its SoC with a format like Txxx(T6000, T8020etc). Once I checked Apple's device driver tree for the iphone15 pro, surprisingly its P/E core used the same name as A16(i.e. Everest and Sawtooth).

Maybe, Anandtech can hire you? Its been a long time since Anandtech had a mobile arch deepdive. You are more than qualified.

There are so many people who are far better than me, this is just my hobby to investigate architecture stuff. Also, I am still in grade10, so better to complete my studies first

 

[poke01]

Maybe Apple just changed its naming convention, maybe they decided to stop exposing their microarchitecture name...etc I don't know. Also, apple names its SoC with a format like Txxx(T6000, T8020etc). Once I checked Apple's device driver tree for the iphone15 pro, surprisingly its P/E core used the same name as A16(i.e. Everest and Sawtooth).

Interesting, I guess we have to wait till the A18 to see if its a new convention by Apple or an anomaly.

There are so many people who are far better than me, this is just my hobby to investigate architecture stuff. Also, I am still in grade10, so better to complete my studies first

Oh wow, nice. You chose a fun hobby!

 

[FlameTail]

Maybe Apple just changed its naming convention, maybe they decided to stop exposing their microarchitecture name...etc I don't know. Also, apple names its SoC with a format like Txxx(T6000, T8020etc). Once I checked Apple's device driver tree for the iphone15 pro, surprisingly its P/E core used the same name as A16(i.e. Everest and Sawtooth).

Yes, this has been known.

There are so many people who are far better than me, this is just my hobby to investigate architecture stuff. Also, I am still in grade10, so better to complete my studies first

 

[FlameTail]

If M4 doesn't bring a major performance uplift in terms of CPU (mainly ST), then Apple is at risk of falling behind their x86 rivals.

What with the rumours that Zen4 is a 40-50% uplift...

 

[junjie1475]

If M4 doesn't bring a major performance uplift in terms of CPU (mainly ST), then Apple is at risk of falling behind their x86 rivals.

What with the rumours that Zen4 is a 40-50% uplift...

40-50% is nearly impossible...

 

[Tigerick]

40-50% is nearly impossible...

Yeah, you should check out upcoming Cortex-X5. It shows 19% IPC improvement which considered breakthrough..

I wonder how similarity between upcoming A18 Pro and Cortex-X5 cause they are almost in the same range of IPC

 

[FlameTail]

40-50% is nearly impossible...

That's what the people in the Zen5 thread are genuinely believing though...

 

[FlameTail]

Yeah, you should check out upcoming Cortex-X5. It shows 19% IPC improvement which considered breakthrough..

*Based on rumoured benchmark numbers

Official event to unveil Cortex X5 is only one month away, eh?

 

[Tigerick]

That's what the people in the Zen5 thread are genuinely believing though...

Not me

 

[FlameTail]

Maybe, Anandtech can hire you? Its been a long time since Anandtech had a mobile arch deepdive. You are more than qualified

Or Chips&Cheese?

I mourn that the old Anandtech spearheaded by Andrei/Ian is no more.

 

[Tigerick]

*Based on rumoured benchmark numbers

Official event to unveil Cortex X5 is only one month away, eh?

So now you don't believe what I calculated but rather believing +40% BS in this forum. Way to go

 

[FlameTail]

So now you don't believe what I calculated but rather believing +40% BS in this forum. Way to go

No I am just pointing out that the 19% IPC you calculated is based on numbers from a leak, and not official numbers from ARM. What's wrong with that?

 

[gdansk]

There's not much to talk about Apple cores. IPC largely stagnant since 2020 but clock speed increases with improved nodes.
Apple also never talks at ISSCC or Hot Chips so again nothing to talk about except for unsure measurements and best guesses. And no one expects the company in the lead to make a big jump again especially after they lost engineers to Nuvia, Qualcomm, etc.

 

[MarkizSchnitzel]

Not really, You should maybe study economics before proclaiming this. Intel is still the #1 chip maker for a reason.

Uh, just because you own an Android phone...

EDIT: even with my 14th gen iPhone, I do not have to charge every day, and my phone is used 8+ hours a day. With that usage is lasts nearly 2 days without needing a recharge.

That is a sample of 1. There is no magic there. In standardized battery tests it's not all that special, even while having a 60Hz screen (the basic one).

 

[Mopetar]

Performance uplift is something that needs further qualification. If you achieve an amazing 30% IPC uplift, but have a 20% clock regression it's nowhere near as impressive. The same is true if AMD has that 40% improvement, but it's only achieved by throwing so much power at the chip that even Intel would blush.

Apple could probably get a 40% uplift if they had a new, better design on a new, better node and they gave it a bigger power budget. Whether all of those stars align is another matter, but I wouldn't want to see them sacrifice on their power efficiency just to get to a 40% number when I'd be more than happy with a 15% gain if they achieved it with even less power than they use now.

 

[Saylick]

40-50% is nearly impossible...

For Apple or for Zen 5?

 

[Mopetar]

Both

 

[FlameTail]

If Zen5 does indeed bring a 40-50% improvement, then all the ARM CPU makers (Apple/Nuvia/ARM) are going to be in trouble.

 

[poke01]

If Zen5 does indeed bring a 40-50% improvement, then all the ARM CPU makers (Apple/Nuvia/ARM) are going to be in trouble.

Apple will be fine they are insulated but would drive them to make better CPUs.

Apart from that WoA will be dead even more.

 

[junjie1475]

For Apple or for Zen 5?

For Apple is impossible, for Zen5 I wouldn't say 100% impossible, since their baseline is not that high, and by playing some tricks on the "standard" of IPC. If you look at the research papers in recent years(10 years or so), you will find that they are all focused on tweaking the current architecture by a few % or so. We should focus more on the absolute performance uplift rather than the percentage, the growing curve is no longer exponential... Just by looking at today's processor, the main components i.e. OoO execution, speculative execution, cache-prefetching...etc are all over 20+ years old. so that's why people expand their performance focus to heterogeneous computing and multi-core architecture. Anyway, seems I talk too much stuff that's out of the scope of this reply.