Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

[Tigerick]

As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.



Comparison of upcoming Intel's U-series CPU: Core Ultra 100U, Lunar Lake and Panther Lake

Model	Code-Name	Date	TDP	Node	Tiles	Main Tile	CPU	LP E-Core	LLC	GPU	Xe-cores
Core Ultra 100U	Meteor Lake	Q4 2023	15 - 57 W	Intel 4 + N5 + N6	4	tCPU	2P + 8E	2	12 MB	Intel Graphics	4
?	Lunar Lake	Q4 2024	17 - 30 W	N3B + N6	2	CPU + GPU & IMC	4P + 4E	0	8 MB	Arc	8
?	Panther Lake	Q1 2026 ?	?	Intel 18A + N3E	3	CPU + MC	4P + 8E	4	?	Arc	12

Comparison of die size of Each Tile of Meteor Lake, Arrow Lake, Lunar Lake and Panther Lake

	Meteor Lake	Arrow Lake (20A)	Arrow Lake (N3B)	Arrow Lake Refresh (N3B)	Lunar Lake	Panther Lake
Platform	Mobile H/U Only	Desktop Only	Desktop & Mobile H&HX	Desktop Only	Mobile U Only	Mobile H
Process Node	Intel 4	Intel 20A	TSMC N3B	TSMC N3B	TSMC N3B	Intel 18A
Date	Q4 2023	Q1 2025 ?	Desktop-Q4-2024 H&HX-Q1-2025	Q4 2025 ?	Q4 2024	Q1 2026 ?
Full Die	6P + 8P	6P + 8E ?	8P + 16E	8P + 32E	4P + 4E	4P + 8E
LLC	24 MB	24 MB ?	36 MB ?	?	8 MB	?
tCPU	66.48
tGPU	44.45
SoC	96.77
IOE	44.45
Total	252.15

Intel Core Ultra 100 - Meteor Lake



As mentioned by Tomshardware, TSMC will manufacture the I/O, SoC, and GPU tiles. That means Intel will manufacture only the CPU and Foveros tiles. (Notably, Intel calls the I/O tile an 'I/O Expander,' hence the IOE moniker.)

 

[SiliconFly]

I'm not hyped on NPU's, should I be? If I'm feeling lazy and I need a numerical solution to a math problem with no closed for solution or some other work that is boring for me to do manually I just hit up ChatGPT. It doesn't happen that often actually.

Am I stuck in the past and missing AI opportunities in my daily life/work?

Yep. NPUs are just being over hyped.

 

[SiliconFly]

Is far is I know ARL-U is a Refresh of MTL om Intel 3. So basically ARL-U isn't ARL.

Makes sense. But I don't think Intel 4 & 3 are design rule compatible!

 

[Ghostsonplanets]

Panther Lake is new design with 2 tiles only. 18A is for CPU+SoC, tGPU is available for 2 version: Intel 3 for 4 XE and N3E for 12 XE

Ah, that explains it. I had forgotten PTL is a 2 Tile design once again. So the iGPU tile for the PTL-U SKU is designed on Intel 3? Quite interesting as it's the first time an Arc GFX is fabbed on Intel nodes.

Bionic Squash already leaked that ARLs iGPU (also with XMX) alone has more than double the TOPs of whole Meteor Lake Combined (70+). LNLs iGPU probably isn't worse and then it has a 40+ TOPS NPU.

I had missed that info from Bionic. Thanks!

FYI - C&C has a new article on MTL's iGPU:

Intel’s Ambitious Meteor Lake iGPU

Intel and AMD both tried to ship iGPUs fast enough to compete with low end discrete cards over the past 10 years with mixed results. Recently though, powerful iGPUs have been thrown back into the s…

chipsandcheese.com

View attachment 96591
View attachment 96590

That's a good read. Much thanks once again!

Makes sense. But I don't think Intel 4 & 3 are design rule compatible!

Intel 3 should be an Intel 4 optimization (Which Intel used to refer as "+" back in the days) but with complete libraries and PDK. Should be design rule compatible with Intel 4.

 

[Thunder 57]

From current Keynote, dude on Twitter posted it, although it's not openly available and probably under NDA.
View attachment 96571View attachment 96572View attachment 96573

For "Process Leadership" there sure are a lot of "External" showing up.

 

[Tigerick]

Ah, that explains it. I had forgotten PTL is a 2 Tile design once again. So the iGPU tile for the PTL-U SKU is designed on Intel 3? Quite interesting as it's the first time an Arc GFX is fabbed on Intel nodes.

4 XE most likely used in PTL-U series but Intel won't call it Arc Graphics, just Intel Graphics...

I had missed that info from Bionic. Thanks!

That's a good read. Much thanks once again!

Intel 3 should be an Intel 4 optimization (Which Intel used to refer as "+" back in the days) but with complete libraries and PDK. Should be design rule compatible with Intel 4.

 

[dullard]

For "Process Leadership" there sure are a lot of "External" showing up.

Intel never claimed wafer capacity leadership.

 

[poke01]

Intel never claimed wafer capacity leadership.

Isn’t wafer capacity leadership what matters more?

 

[dullard]

Isn’t wafer capacity leadership what matters more?

Intel is essentially operating as two companies: (1) chip design and (2) chip fabrication. Wafer capacity matters far more to (2) than (1) assuming there are available alternatives.

 

[Ghostsonplanets]

Thats what they said about MTL too (and it didn't turn out well). Without seeing LNL in action, we can only hope it's better.

TBH MTL design is just stupid. Too much tiles being used and the LPE cores are basically useless. No wonder Exist said way back then that MTL project was basically a learning experience that Israel watched the failings to do a better product with LNL.

Are you sure Intel 3 is for 4 Xe? Looks like it's actually for the tCPU after all. Not sure though.

PTL/Cougar Cove CPU should be using 18A.

 

[SiliconFly]

PTL/Cougar Cove CPU should be using 18A.

Yep. Panther Lake tCPU is 18A. Question is how does Intel 3 fit in the picture with Arrow Lake & Panther Lake according to the first slide?

http://www.portvapes.co.uk/?id=Latest-exam-1Z0-876-Dumps&exid=attachments/1000006585-jpg.96571/

Should be Arrow Lake-U with Intel 3's tCPU, replacing MTL-U

Panther Lake is new design with 2 tiles only. 18A is for CPU+SoC, tGPU is available for 2 version: Intel 3 for 4 XE and N3E for 12 XE

It has to be either one of the above. Both scenarios can't be true at the same time. Either LNC or Alchemist+ is on Intel 3 in some form.

 

[DavidC1]

For "Process Leadership" there sure are a lot of "External" showing up.

The idea itself of using whatever process necessary is a good thing.

Let's look at what they themselves have outlined as a problem within their company:
-The process development team got arrogant and treated equipment vendors badly.
-The foundry service never worked out because the management saw it merely as an icing on the cake and potential customers were treated as 2nd class citizens, rather than equal.
-Many years of decisive process advantage meant their design team was wasteful with resources and time. The only team within Intel more arrogant than the process team was design. The old adage "crap CPUs made up by excellent process" was true.
-Semianalysis went into detail about such waste: https://www.semianalysis.com/p/rebuilding-intel-foundry-vs-idm-decades

Hot Lots -

On the other hand, a leading-edge wafer can also be processed in a few weeks if no care is given to cost, but this leads to tremendous inefficiency with tools constantly

They could do as many hot lots as they want, they can do as many samples as they want.

David Zinsner, Intel CFO

Now, they are going to charge their internal design team for the hot lots.

Steppings -

They can do as many steppings as they want.

David Zinsner, Intel CFO

It took Intel 12 steppings to bring Sapphire Rapids to market, whereas AMD usually takes only 2 to 3 steppings for competing chips such as Bergamo and Genoa.

We even heard rumors from former employees that there was a time when some Intel design teams would rather send a design to the fabs, get a hot lot sample back, and test it for bugs rather than complete more through simulations and verification.

Intel plans to fix this issue by reducing the number of samples and steppings by charging the design and product business units a fair price for these operations rather than allowing as many steppings as wanted.

Test, Sort, Bin -

Intel believes charging business units more directly for test, sort, and bin will make the business units more conscious about what test strategies they use within designs and lead to savings of ~$500M a year.

Design and Ramp -

Intel design teams also tend to ignore the reticle conundrum and lithography tool throughput issues for internal manufacturing, which is something TSMC charges customers for. For a deeper explanation, see here.

This essentially tells us that Intel's problems were widespread and it wasn't simply a matter of "replace the CEO" or "split the company". These were long-standing issues arising from a company that ironically touts "Only the Paranoid win" but not living up to that standard themselves, and were comfortable with their massive financial stockpile and believing they were invincible.

Look at Golden Cove, and even the suspected performance for Lion Cove. They are disappointing. Because they lost the process leadership, they are fully exposed. Rather than thinking Intel was a decent CPU designer with phenomenal process technology, their process leadership was masking growing internal problems just as if a mother would shield her adult son from all troubles, even if going through that trouble would mean her son would benefit from it.

They are basically telling Intel Foundry that you can't be just making chips for Intel anymore, and it has to do all things for all customers, and they are telling Intel design teams that we won't give you training wheels and have to stand on merit, on equal ground.

We should have cycles of TSMC-fabbed Intel chips prompting Intel Foundry to do better, and Intel-fabbed AMD and Nvidia designs prompting Intel's design to do better.

 

[SiliconFly]

The idea itself of using whatever process necessary is a good thing.

Let's look at what they themselves have outlined as a problem within their company:
-The process development team got arrogant and treated equipment vendors badly.
-The foundry service never worked out because the management saw it merely as an icing on the cake and potential customers were treated as 2nd class citizens, rather than equal.
-Many years of decisive process advantage meant their design team was wasteful with resources and time. The only team within Intel more arrogant than the process team was design. The old adage "crap CPUs made up by excellent process" was true.
-Semianalysis went into detail about such waste: https://www.semianalysis.com/p/rebuilding-intel-foundry-vs-idm-decades

Hot Lots -


Now, they are going to charge their internal design team for the hot lots.

Steppings -



Intel plans to fix this issue by reducing the number of samples and steppings by charging the design and product business units a fair price for these operations rather than allowing as many steppings as wanted.

Test, Sort, Bin -

Design and Ramp -


This essentially tells us that Intel's problems were widespread and it wasn't simply a matter of "replace the CEO" or "split the company". These were long-standing issues arising from a company that ironically touts "Only the Paranoid win" but not living up to that standard themselves, and were comfortable with their massive financial stockpile and believing they were invincible.

Look at Golden Cove, and even the suspected performance for Lion Cove. They are disappointing. Because they lost the process leadership, they are fully exposed. Rather than thinking Intel was a decent CPU designer with phenomenal process technology, their process leadership was masking growing internal problems just as if a mother would shield her adult son from all troubles, even if going through that trouble would mean her son would benefit from it.

They are basically telling Intel Foundry that you can't be just making chips for Intel anymore, and it has to do all things for all customers, and they are telling Intel design teams that we won't give you training wheels and have to stand on merit, on equal ground.

We should have cycles of TSMC-fabbed Intel chips prompting Intel Foundry to do better, and Intel-fabbed AMD and Nvidia designs prompting Intel's design to do better.

Excellent post!

 

[jpiniero]

Intel launches first Core Ultra CPUs for LGA-1851 socket, featuring Meteor Lake architecture for the edge - VideoCardz.com

Intel launches Meteor Lake and Raptor Lake for systems on the edge The first official LGA-1851 processor is here. In 2023, Intel’s plans for the LGA-1851 socket didn’t materialize as rumored. Although there were expectations for the launch of the Meteor Lake-S desktop CPU series, Intel opted to...

videocardz.com

The desktop Meteor Lake is here for Embedded. LGA 1851 too. Cuz Embedded, the price is likely really high.

Needless to say, all they talk about is AI, AI and more AI.

 

[Ghostsonplanets]

Is Lunar Lake meant to be a one-off thing? Because there's no roadmap for a LNL successor currently, right? PTL is ARL successor on 15 - 45W range. Will LNL be Intel 7 - 28W offering until they release a new P core?

Intel launches first Core Ultra CPUs for LGA-1851 socket, featuring Meteor Lake architecture for the edge - VideoCardz.com

Intel launches Meteor Lake and Raptor Lake for systems on the edge The first official LGA-1851 processor is here. In 2023, Intel’s plans for the LGA-1851 socket didn’t materialize as rumored. Although there were expectations for the launch of the Meteor Lake-S desktop CPU series, Intel opted to...

videocardz.com

The desktop Meteor Lake is here for Embedded. LGA 1851 too. Cuz Embedded, the price is likely really high.

Needless to say, all they talk about is AI, AI and more AI.

There's an Intel Core Ultra 3 there. Maybe that's where the Intel Core Ultra 5 115U went.

 

[SiliconFly]

...PTL is ARL successor on 15 - 45W range...

That assumption may not be right. Initial leaks suggested that PTL might be more of a LNL replacement (28W or less), although later leaks suggest it may also replace ARL-H as well (up to 45W; but not sure). Higher power desktop parts might still be ARL-S Refresh.

 

[DavidC1]

There was a brief discussion in December 2021 from @IntelUser2000 and then @Ajay that Arrow Lake was on Intel 3. But no real details were given. http://www.portvapes.co.uk/?id=Latest-exam-1Z0-876-Dumps&exid=thread...ure-lakes-rapids-thread.2509080/post-40656166

That's me, so you missed the note some time back.

Now Intel has proper high volume products on Intel 3 with Sierra Forest and Granite Rapids. The fillers and the plusses are not 3 and 18A but 4 and 20A with minimal usage, while 3 and 18A will have greater than expected benefits and have much higher volume, or you could say conversely that Intel 4 and 20A will be below expectations.

Intel 4 = Intel 3-
Intel 20A = Intel 18A- (Yes those are minuses)

The latest presentations do confirm suspicions that they are still stuck in the high end, high clocked mindset from the 2000's Pentium 4 Netburst era, and aren't the best fit for density, nor for low power. Hence, the usage of Intel 3 for low end iGPU and TSMC for the higher end one.

 

[Ghostsonplanets]

That assumption may not be right. Initial leaks suggested that PTL might be more of a LNL replacement (28W or less), although later leaks suggest it may also replace ARL-H as well (up to 45W; but not sure). Higher power desktop parts might still be ARL-S Refresh.

The 15-45W range is already covered by ARL. PTL is the next main series on mobile. Where's LNL 2 on the 7 - 28W range? Because PTL-U 15W doesn’t replace LNL. We can see that already with the fact the Xe iGPU tile is half the size of LNL iGPU.

I'm guessing LNL 2 will only happen once Intel has new P and E cores to improve performance at low power. Doesn't make sense to refresh LNL with the same Lion/Cougar Coves they're already using.

 

[FlameTail]

Is it only me who gets confused between Granite Ridge and Granite Rapids?

 

[SpudLobby]

If Intel lets LNL just float like it’s Lakefield or whatever, bad sign. Would also be annoying just generically. Here’s to hoping they follow up with a successor or that PTL’s architecture is good enough to make it roughly irrelevant.

 

[coercitiv]

Doesn't make sense to refresh LNL with the same Lion/Cougar Coves they're already using.

That seems like a good reason until you realize that is exactly what they would do if serious about commercializing for the target form factor / market segment.

 

[uzzi38]

The 15-45W range is already covered by ARL. PTL is the next main series on mobile. Where's LNL 2 on the 7 - 28W range? Because PTL-U 15W doesn’t replace LNL. We can see that already with the fact the Xe iGPU tile is half the size of LNL iGPU.

I'm guessing LNL 2 will only happen once Intel has new P and E cores to improve performance at low power. Doesn't make sense to refresh LNL with the same Lion/Cougar Coves they're already using.

If everybody loves and wants LNL, what do you think happens to ARL-U?

Why even bother having a successor to the cheaper (but not cheaper than RPL-U) mobile die that nobody really wants?

I dunno, to me it makes perfect sense for LNL style designs to cover the entire -U laptop range, excluding cheaper designs.

 

[FlameTail]

If everybody loves and wants LNL, what do you think happens to ARL-U?

Why even bother having a successor to the cheaper (but not cheaper than RPL-U) mobile die that nobody really wants?

I dunno, to me it makes perfect sense for LNL style designs to cover the entire -U laptop range, excluding cheaper designs.

Intel's strategy is to flood the market with options, even if it makes no sense.

 

[trivik12]

Few details from Intel today.

5 million MTL shipped till date and they are expecting 40 million for 2024 across MTL and what ever they ship for LNL or ARL.

LNL will have 45 Tops for NPU and 100+ across CPU/GPU/NPU. Nothing beyond that for now.

 

[dullard]

Intel's strategy is to flood the market with options, even if it makes no sense.

Intel is extremely limited in each node's production quantity. So, Intel has a choice: (A) extreme shortages of processors or (B) processors from multiple different nodes at the same time. They chose route (B) which can work if they are priced correctly.

 

[Ghostsonplanets]

Some tidbits from Intel Vision:

https://twitter.com/x/status/1777725264421851526

https://twitter.com/x/status/1777723909972041979

https://x.com/anshelsag/status/1777723319250452511

Lunar Lake shots below. Gelsinger also announced MTL shipped >5M so far.