I believe (and correct me if I'm wrong) in clamshell mode the data signals are separate for each chip and can be routed point to point, but the command/address signals which would normally be all run to a single chip need to run to both. The GDDR standard allows for pin swapping specifically so that you can run clamshell with those signals mirrored on both sides, allowing you to run the CA signals to where the devices are and then split at the via. CA runs at 2xf, which isn't as critical as the data lines, but it would still create impedance issues if you have to t the signals 10s of mm before the chips and run them to two separate chips.