Considering how GDDR6 will get cheaper in upcoming months/years with sheer volume manufacturing I would not put my hopes high for HBM2 on any consumer products, unless...
... any of the companies will be extremely desperate to remain relevant in consumer space for one reason or another.
Mmmmmm .... I am not specifically talking about HBM for consumer devices. Of course CDNA is not a consumer product and current Instinct series use HBM2.
Having said that, it remains to be seen how expensive HBM2e is going to be. Right now there is excess DRAM capacity even without the P2 fab coming online.
HBM2 wafer availability increased many times over what is available two years ago because of numerous fab lines coming online like the gigantic fabs which I mentioned in the sources above.
Additionally, right now for the CDNA GPUs TSMC can do HBM2 integration from the KGSD dies with CoWoS
in-house if needed.
Compare this to V64, where they need to get the KGSDs from Hynix, the GPU die from GloFo, the interposer from UMC and send them to SPIL who will integrate them all.
As regards HBM2e vs DDR5 in the context of X3D and CDNA2, it is going to be an interesting comparison because DDR5 is more complex than DDR4, there is onboard PMIC and ECC for Read and write plus double the channels, it will be costlier to manufacture.
In this context of X3D with HBM2e for example, 4 x 1 Hi stack (16Gb per die and 4096 bit wide, 4x1024) would not even need TSVs between stacked dies and the base die could already be an interposer. For this specific case of 8GB on chip memory it is basically four single DRAM dies and everything else is there. If they can hit those 3.8 Gbps (SK Hynix advertised max speed) or 4.1 Gbps (Samsung advertise max speed), its can be a mind boggling ~2 TB/sec.
Futhermore, if we want to take this concept further, a special SoC on N5 can have enough DRAM for GPU and system and has enough density to pack a GPU to boot. e.g. XSX SoC + RAM on N5 would be around 300mm2 which is manageable... went a bit ahead of myself here.