Its drug addiction.I'm coming here because this is not like certain other places that discuss hardware, and its disappointed to see so much focus on and good faith assumed for the worst clowns on YouTube (who have a history of lying). I'm probably in the minority and I presume this will come across as whining and unconstructive but I think the quality of the discussion would improve if we stopped acknowledging actors who have proven not to be serious. I'm actually OK with gossip and chatter and even the sites collecting those, just not the people we already know are dishonest and who earn money off of making up new lies it which messes up the incentives.
/rant
Would the type, to be used in client, using fanout, be the 3rd type, or is it something completely different?Zen6 has three CCD types.
If thats the case, my hopes are for a CPU with 2x Zen 6 16C dies, on AM5.Zen 5 standard would be N4 with 8 cores per CCD
Zen 5c N3 with 16 cores per CCD
Zen 6 standard N3 with 16 cores per CCD
Zen 6c N2 with 32 cores per CCD
Those are server ones.my hopes are for a CPU with 2x Zen 6 16C dies, on AM5.
I am of opinion that they will hit 1.2-1.25 on average.Clocks will stay sameish. What will change most is ppw. I think it will shoot through the roof ( at sane clock speeds ~ 4ghz).1.15x IPC would be a disappointment for many. But that's why I think the hype train must die.
Clock regression would kill it. But so far Zen teams have always avoided that (even if Zen 3 did have lower all core clocks).
server is the 32cores per CCD, is it not? Are they going to have 8 cores CCD for desktop, 16C and 32C for server then?Those are server ones.
Not coming to client.
Speaking for myself.... Since I know AMDs reputation as of late (the last 6 years) of under promising, and overdelivering, and we have one poster that seems to have mostly correct information, I believe the hype.... to a point. I don't care what the reputation of these youtube clowns is, if they are close the what I think is true, then fine.I'm coming here because this is not like certain other places that discuss hardware, and its disappointed to see so much focus on and good faith assumed for the worst clowns on YouTube (who have a history of lying). I'm probably in the minority and I presume this will come across as whining and unconstructive but I think the quality of the discussion would improve if we stopped acknowledging actors who have proven not to be serious. I'm actually OK with gossip and chatter and even the sites collecting those, just not the people we already know are dishonest and who earn money off of making up new lies it which messes up the incentives.
/rant
Nah.Clocks will stay sameish
No, Turin is world's most straightforward 25% socket power bumpWhat will change most is ppw. I think it will shoot through the roof ( at sane clock speeds ~ 4ghz).
Dense.server is the 32cores per CCD, is it not?
Yeah about that.Are they going to have 8 cores CCD for desktop, 16C and 32C for server then?
You can increase socket power, but that does not say anything about ppw.No, Turin is world's most straightforward 25% socket power bump
Actually, he is not entirely wrong.
16CU RDNA3(3.5) at 2.2GHz would be on par with RTX 3050 mobile.
As you mentioned, the problem is the missing BW, which will cripple performance.
On the other hand, Strix halo with 24CU should compete with 4050 laptop, If 32MB Mall and 256-bit memory controller will not be cut-down significantly.
It kinda does, 25% socket power bump on the same platform is pretty major.but that does not say anything about ppw.
Yeah Meta already did an oopsie that gave us SRF-AP.I have the feeling that AMD themselves purposely "leaked" this document in order to curtail the 30%+ IPC claims
It kinda does, 25% socket power bump on the same platform is pretty major.
But the perf signs.
Yeah Meta already did an oopsie that gave us SRF-AP.
Dead on arrival.What about the regular SRF?
Which is why SRF-AP while you cross your hands and pray CWF goes well.Regular 144 core SRF seems quite hopeless even against Bergamo, not to mention Turin Dense - lower than full core-count models.
Why would someone need an NDA for an internal document.
What do you mean by that?Yeah Meta already did an oopsie that gave us SRF-AP.
There is discrepancy, true, but look what TDP that RTX 3050 has. Only 35W!View attachment 86483
Half correct.
I've mistaken 20CU with 24 CU, but look at what he says in the description of Strix Point iGPU: 16 CUs, without Infinity Cache - trades blows with 3050 laptop GPUs.
While showing the slide in which 20CU, 128 bit but WITH Infinity Cache - 3050 perf/W class, presumably existing within that 55W TDP thermal envelope, in which Strix Halo should exist on the lower end side.
He has slides that say one thing, and he carries on to report something completely different.
Speaking for myself.... Since I know AMDs reputation as of late (the last 6 years) of under promising, and overdelivering, and we have one poster that seems to have mostly correct information, I believe the hype.... to a point. I don't care what the reputation of these youtube clowns is, if they are close the what I think is true, then fine.
They just couldn't shut up about Turin-D doing violence to so called competition and how much they're gonna win on TCO in 2024 sockets.What do you mean by that?
They might have leaked this on purpose, but 10-15% does not seem reasonable according to the listed changes. Zen 4 was a tweak of Zen 3 and got the upper bound of that range. Zen 2 got that range and core itself was not updated with even half of what Zen 5 brings. Zen 5 changes are stratospheric in many aspects and 10-15% is really not what you would expect from such radical bump.I have the feeling that AMD themselves purposely "leaked" this document in order to curtail the 30%+ IPC claims. 10-15% seems reasonable with the listed changes.
That's kinda very flexible.I wonder how set in stone those designs are with regards to core count, CCX layout, and b.L setup
I mean for nT it kinda is until you see Turin socket perf.but 10-15% does not seem reasonable according to the listed changes.
I agree. Core is wider, so enabling SMT should provide a bigger gain in performance.Assuming that both the "30%+ IPC" and "no way it's going to be 30% IPC" camps are valid, there's an easy explanation:
SMT uplift exceeds ST uplift.
Building a wide core and feeding a wide core are two different matters. But to the extent that Zen5 has difficulty utilizing its wider structures in ST, it should have an easier time utilizing those structures via SMT.