- Mar 3, 2017
- 1,615
- 5,870
- 136
Intel put all their exciting new ideas into one product, just like with Pentium 4!While PHX suffers from being RDNA 3 bound and thus has generally poor idle.
MTL is really an impressively poor thing, considering that it's meant to be an "all of our engineering skills went into this" product, tiles, packaging and all the good things Intel could do with it.
9 months later too...
Ok...but isn't he saying "to go wider is the goal" here?Going beyond 8-wide is difficult.
If you say soDoesn't mean anything.
Cause we have to sell products in the future and cant blow our entire load in 2024 😂No clue, enlighten me please?
Actually, better question: if widening the cores is just free efficiency at any frequency, why don't we have 10/12/14 wide decode?
I don't think so. That would imply Power ∝ SQRT (Frequency). Which simply can't be true.Power consumption increases exponentially with increasing frequency.
It's like:
Frequency = (Power)²
I don't think so. That would imply Power ∝ SQRT (Frequency). Which simply can't be true.
Here's the generalized power formula for semiconductors for giggles:
View attachment 96719
Credit: @Idontcare
May not even be a AM5 bug unless you have verified that AM4 and LGA1700 don't suffer from this issue.The only bug I still experience with Z4 is occasional crackling on BT audio.
Yeah I don't even remember when it appeared, might have been on my last AM4 build as well. Its not particularly frequent or offensive, I just mentioned it because whoever fault it is should not be completely off the hookMay not even be a AM5 bug unless you have verified that AM4 and LGA1700 don't suffer from this issue.
I think, no one argues that. But besides @FlameTail getting even his simplified function terribly wrong there applies a certain additive offset and the curve might not be as steep in every interval. Much more so, when we talk about SoCs that have a looooot of uncore with a rather static consumption.Power is function of Voltage squared. Which is also shown in the formulas.
Actually, better question: if widening the cores is just free efficiency at any frequency, why don't we have 10/12/14 wide decode?
Wow, thank you, very complete response.Two big reasons:
Firstly, the cost of widening variable width decode is not linear, but exponential. This is the one big advantage that 64-bit ARM has on x86, they can just decide how wide they want their decode to be and duplicate the units, x86 has to deal with first finding out where the instruction boundaries are and then muxing data from the correct offset to every decoder. It's notable that both major x86 vendors use designs where they have a wider path from (fixed-width) uop cache and narrower decode.
Secondly, as noted upthread, jumps are too frequent. Monolithic very wide decode will just waste power decoding instructions that are not going to be executed. One solution to this is the very interesting split decode (2x3) implementation in Tremont, I believe AMD has some patents that describe a similar design.
I have this same problem on Z3/AM4 but not just bluetooth, my DAC, my sound card, and bluetooth. Annoying AF.May not even be a AM5 bug unless you have verified that AM4 and LGA1700 don't suffer from this issue.
No problem whatsoever with my Nuprime uDSD (B450, Z3).I have this same problem on Z3/AM4 but not just bluetooth, my DAC, my sound card, and bluetooth. Annoying AF.
Because it's not free, at least? What are you gonna do, for example, with the supposed 30-40% Cac increase for a wider core, or with the corresponding increase in clock mesh power? To even get close to the efficiency of the previous gen's they have (had?) a hell of a lot to optimizeActually, better question: if widening the cores is just free efficiency at any frequency, why don't we have 10/12/14 wide decode?
Really not the intended competition.The question, does it need to be great to beat Arrow Lake
What are these competent cores?Really not the intended competition.
It has to bury far, far more competent cores than LNC and decisively.
Nuvia/Apple/ARM in that order exactly.What are these competent cores?