Discussion Qualcomm Snapdragon Thread

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FlameTail

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4500 Geek6 ST and 220 Cine 24 ST? How do you think QCOM will be able to accomplish this jump in a single generation? Not even Z5 is rumored to reach these levels.
Well, for one- I quadrupled the L2 cache from 12 MB to 48 MB. They could massively widen the core to achieve this. Of course this is all my speculation.

How will they achieve it realistically though?

Idk.

All I know is that Qualcomm will need that to stay competitive with it's rivals.

AMD
AMD's Zen5 core is said to bring a 40% uplift in SPEC INT RATE 2017. Since SPEC tends to correlate well with Geekbench, we are looking at a 40% uplift in Geekbench too. Phoenix Point -> Strix Point, is 2600 -> 3650.

But Strix Point is coming in H2 2024. Strix's successor with Zen6 is rumoured to be released sometime in 2026H1.

Considering previous Zen generations, Zen 6 will bring atleast a 15% performance uplift. So we are looking at about 4150 points in Geekbench 6, for Strix Point successor.

And this all that was for AMD's HS parts. As we know AMD also sells the HX parts, which tend to have 10-15% higher ST than the HS parts.

Apple
Apple is said to be moving to a 12 month release cadence for their M series chios. This means M4 in 2024Q4 (as Gurman has reported), and M5 in 2025Q4. So Snapdragon X2 series will have to compete with M5.

Apple M3 does 3100-3200 in Geekbench 6. If we assume a 15% generation-over-generation uplift for M4 and M5,

M4 = 3700
M5 = 4250

And Apple has an even more comprehensive advantage over Qualcomm in Cinebench 2024 ST.



Geekbench 6 ST
X Elite : 2900
M3 : 3200

Cinebench 2024 ST
X Elite: 128
M3 : 148

By the same 15% YoY extrapolation,

M4 : 170
M5 : 195
 
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adroc_thurston

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Well, for one- I quadrupled the L2 cache from 12 MB to 48 MB. They could massively widen the core to achieve this. Of course this is all my speculation.
moar L2 doesn't help magically.
AMD's Zen5 core is said to bring a 40% uplift in SPEC INT RATE 2017. Since SPEC tends to correlate well with Geekbench, we are looking at a 40% uplift in Geekbench too. Phoenix Point -> Strix Point, is 2600 -> 3650.

But Strix Point is coming in H2 2024. Strix's successor with Zen6 is rumoured to be released sometime in 2026H1.

Considering previous Zen generations, Zen 6 will bring atleast a 15% performance uplift. So we are looking at about 4150 points in Geekbench 6, for Strix Point successor.

And this all that was for AMD's HS parts. As we know AMD also sells the HX parts, which tend to have 10-15% higher ST than the HS parts.
AMD is a very special case, their rules do not apply to anyone else.
 

FlameTail

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Snapdragon X2 Speculation/Concept V5+

(with revised CPU performance benchmarks).

Dir area saved from CPU L2 cache reduction, was instead dedicated to the GPU, increasing it's performance by 11%.


vs Apple
X2 Elite has a GB6 ST of 4050. By running it on Linux instead of Windows, they can get it upto 4250, thereby which Qualcomm can claim parity with Apple M5.

vs AMD
Since X2 Elite is announced in 2025Q4, before Zen6 mobile (>4000 GB6) releases in 2026H1, they will be able to claim a victory over AMD's best at the time, which will be Strix Point (~3600 GB6).

___

Snapdragon X2 base version, will compete with base M4, and not base M5. X2 Plus will compete with base M5. X2 is supposed to be a low-end mainstream part.
 
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moinmoin

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Jun 1, 2017
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The lack of boost except for a select few of high premium chips is really funny. QC may well carve out a WoA niche in offices where laptops are little more than glorified "thin" clients (and Surface gonna Surface anyway). But anybody calling that a serious attack on the current x86 domination of the traditional PC market has to be kidding.
 

FlameTail

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The lack of boost except for a select few of high premium chips is really funny. QC may well carve out a WoA niche in offices where laptops are little more than glorified "thin" clients (and Surface gonna Surface anyway). But anybody calling that a serious attack on the current x86 domination of the traditional PC market has to be kidding.
Yes disabling the boost clock was disgusting.

Maybe Qualcomm intentionally leaked that in advance to gauge our reaction. Considering our reaction is negative, they will enable boost clock.

We'll find out soon.
 
Jul 27, 2020
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Maybe Qualcomm intentionally leaked that in advance to gauge our reaction. Considering our reaction is negative, they will enable boost clock.
Sure. They are watching this thread closely and besides, they will soon appoint you as their Chief Experience Officer so hopefully you will still engage in discussions here, unlike some of their architects subscribed to this thread who seldom say anything.
 
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FlameTail

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Speaking of Dev Kits, will they release an updated Dev Kit with X Elite or X Plus?

The last Windows Dev Kit (Volterra) used the 8cx Gen 3.
 
Jul 27, 2020
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Well, for one- I quadrupled the L2 cache from 12 MB to 48 MB.
Doing just that and nothing else will still be expensive because the bigger cache may reduce yields. Even a microscopic defect in the cache die may cause it to be rejected during QA/QC. And an intact cache that large would still have higher latency than the smaller one it will be replacing. They need something like IBM's virtual cache implementation: https://www.anandtech.com/show/16924/did-ibm-just-preview-the-future-of-caches
 
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FlameTail

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Doing just that and nothing else will still be expensive because the bigger cache may reduce yields. Even a microscopic defect in the cache die may cause it to be rejected during QA/QC. And an intact cache that large would still have higher latency than the smaller one it will be replacing. They need something like IBM's virtual cache implementation: https://www.anandtech.com/show/16924/did-ibm-just-preview-the-future-of-caches
This is very interesting. Has IBM patented this technology?

This could be a viable hack to greatly boost ST performance of modern CPUs.

In X Elite for instance,
A single core can access it's private L1 and 12 MB shared L2.

With the above technique, a single core can access it's private L1, 12 MB shared L2, and a 24 MB virtual L3 (from 24 MB of L2 of the other two core clusters).
 

Ghostsonplanets

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Mar 1, 2024
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🚨🚨🚨 Heavy accusation from Charlie🚨🚨🚨

@FlameTail @adroc_thurston


Free article

Step forward a little in time. After OEMs got initial samples and made something close to the final designs, SemiAccurate got reports of poor performance. By poor we mean far sub-50% of the numbers Qualcomm was telling them in the technical docs and presentations.

Later, with more Snapdragon X Elite samples in the wild and many more revisions of WART, we got similar reports from OEMs and another Tier 1. Both reported numbers that were nowhere close to what Qualcomm promised. How not close? Above 50% this time but one used the term ‘Celeron’ to describe performance. The claims of better than Apple’s Rosetta 2 x86 emulation are clearly not real on what is probably the release hardware and software. Actually the silicon emulation may be better but everything else is unquestionably not.
 

Nothingness

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Jul 3, 2013
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🚨🚨🚨 Heavy accusation from Charlie🚨🚨🚨

@FlameTail @adroc_thurston


Free article
That's good news: WoA machines will be a failure because of MS. Prices will go down. And Linux users who don't care how poor Windows is will be happy... provided one can install Linux that is

Joke aside, it looks like MS failed again. I hope this won't kill the platform.
 

SarahKerrigan

Senior member
Oct 12, 2014
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This is very interesting. Has IBM patented this technology?

This could be a viable hack to greatly boost ST performance of modern CPUs.

In X Elite for instance,
A single core can access it's private L1 and 12 MB shared L2.

With the above technique, a single core can access it's private L1, 12 MB shared L2, and a 24 MB virtual L3 (from 24 MB of L2 of the other two core clusters).

IBM may have patented some implementation details, but the concept has been done before by others - TileGX, for instance, had a "virtual L3" consisting of foreign L2 slices.
 

SarahKerrigan

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Oct 12, 2014
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🚨🚨🚨 Heavy accusation from Charlie🚨🚨🚨

@FlameTail @adroc_thurston


Free article

Charlie says a lot of things. Release is close enough that it will soon become very clear whether they're true or not. Considering he repeatedly refers to the X Plus as the "X Pro", I'm frankly questioning some of his attention to detail on this one.
 
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