Discussion Speculation: Zen 4 (EPYC 4 "Genoa", Ryzen 7000, etc.)

[Vattila]

Except for the details about the improvements in the microarchitecture, we now know pretty well what to expect with Zen 3.

The leaked presentation by AMD Senior Manager Martin Hilgeman shows that EPYC 3 "Milan" will, as promised and expected, reuse the current platform (SP3), and the system architecture and packaging looks to be the same, with the same 9-die chiplet design and the same maximum core and thread-count (no SMT-4, contrary to rumour). The biggest change revealed so far is the enlargement of the compute complex from 4 cores to 8 cores, all sharing a larger L3 cache ("32+ MB", likely to double to 64 MB, I think).

Hilgeman's slides did also show that EPYC 4 "Genoa" is in the definition phase (or was at the time of the presentation in September, at least), and will come with a new platform (SP5), with new memory support (likely DDR5).

What else do you think we will see with Zen 4? PCI-Express 5 support? Increased core-count? 4-way SMT? New packaging (interposer, 2.5D, 3D)? Integrated memory on package (HBM)?

Vote in the poll and share your thoughts!

 

[deasd]

Now that I think about it. This is not the first time AMD does this.

View attachment 62114

Also in this case the ThreadRipper is actually 42% faster than the $20,000 2S Platinum set up. This time it just happens to be on a Ryzen 7000 CPU, so it's more popular than ThreadRipper

I have initial conclusion that rendering tests might not be suitable tests for performance measurement, after saw 3dcenter's Blender summary across different site and different Cinebench version could output quite different results.... I seriously assume that it's the demo files that to be rendered plays a big role here, for any architecture some demo files are faster but the other demo files are not.....it's a shame that no site could maintain a permanent/steady rendering demo year after year to show difference, and LisaSu's AMD seems to be fond of sandbag their products by using rendering test. I'm not saying render is not worth testing anymore but it's rather better to be a less important test.

edit: as for the FASTER/SLOWER debate:

297second vs 204second , 204second is FASTER

an easy convertion of above data:

204 Instruction per Sec VS 297 Instruction per Sec , 297 IPS is FASTER

the most important question is, which method(second or IPS) did some theoretical tests like Cinebench use, when calculating/outputing their results/score? This would be very different.

 

[poke01]

See this is why AMD > Intel.

AMD also teaches us Math.

 

[coercitiv]

AMD also teaches us Math.

This case teaches us about more than Math, language and conventions too. The main issue we have here is addressing differences in time with percentages, as our brains fail to realize that using "time to complete" as benchmark results in a non-linear scale. It's therefore highly deceptive to use percentages, which we consider linear by nature.

When talking solely about time we're unable to say "I completed this task 100% faster", because that means 0 seconds and would result in infinite speed. The better way to address this is to:

• use elapsed time when talking about time measurements - "I finished the exam in half the time", "The warp engine reached the moon in 0.01% of the time needed by the old rocket engine", "The AMD CPU finished the benchmark in 69% of the time needed by the competition"
• always convert time to speed when the intent is to compare performance using percentages, especially when performance difference is so much better represented on a linear scale

Here's what happens with ambiguous language, I'll use the rocket engine from above:

• The warp engine reached the moon in 0.01% of the time needed by the old rocket engine
• The warp engine reached the moon 99.99% faster than the old rocket engine

Using the second sentence alone, tell me you're not tempted to think the warp engine is only twice as fast as the old rocket engine. It has to be just twice as fast, otherwise how would 200% faster look like, right? RIGHT?!

 

[DrMrLordX]

What will AMD do if Meteor Lake arrives ahead of schedule and before Zen 5

Nothing.

It's already delayed to 2023, so it's not possible for it to be "ahead of schedule". We don't even know how many Meteor Lake SKUs there will be, or if desktop will get any kind of Meteor Lake with core counts competitive with Raptor Lake. AMD is going to launch Phoenix and Dragon Ridge, and just ride those for awhile. They'll be fine. On desktop? Who knows? Again, probably nothing.

In any case Meteor Lake isn't going to the server room. Genoa is going to beat Sapphire Rapids and Emerald Rapids. The scary thing is that if those CBR23 MT numbers are correct, AMD has figured out how to use tweaked N5 to significantly increase all-core clocks @ isopower, which is going to do a lot more for their 64c+ behemoths than any piddly increase in ST performance that we might care about on the desktop. Yes I'm aware that the 7950X is probably a 125W TDP part (rather than a 105W TDP part) but still. It's impressive!

When you start thinking about Zen4 in that light, it might become clear that AMD spent a lot more time trying to figure out how to increase throughput than anything else. Look at the differences in MT CBR23 between a 3950X and 5950X. It's really not that impressive. According to at least this source:

Cinebench R23 Scores [Updated Results]

Cinebench R23 is the newest instalment of the most popular CPU-Rendering Benchmark Cinebench. We have the Score Results for all modern Processors.

www.cgdirector.com

A 5950X is only 9% faster than a 3950X in MT CBR23. Whereas a 7950X is 42% faster than a 5950X? Wow.

I don't see why an improved Intel 7 process

That's possible, we just don't know how many improvements Intel can squeeze out by this point. That's their fourth whack at 10nm (10nm, 10nm+, 10SF, 10ESF/Intel 7). They've already made some significant sacrifices to reach those clocks and power characteristics. If you look at the 12900KS, that's probably an indicator of where the 13900K will be.

moreover there's the rumor that the -mont and Cove clusters and uncore in RPL will be on different voltage planes, unlike the situation in ADL.

That'll just mean they can run Gracemont+(?) cores at a lower voltage than otherwise when ramping up clocks on the Raptor Cove cores. Raptor Cove will still have an overall lower power budget, so it's not clear what effect that will have on performance.

I just reported you for being Off Topic and adding more confusion to this thread.

Aw cmon, it was funny.

 

[JoeRambo]

In my opinion the only thing AMD needs to worry about is Intel starting to produce compute/cache chiplets on same advanced TSMC processes as they are. Or some miracle from Intel's own processes where they are able to catch up with TSMC.
Process advantage extends from desktop where Zen4 might be able to clock the same with half the power and have comparable performance ( does not really matter as long as it's +-10% IPC ) to servers where running 64C say same speed gives insane advantage in throughput versus competitor who can fit 40C in same TDP only. Or 96 versus 56, again +-10% or +-200mhz when on full load means nothing.

 

[Kedas]

About the blender demo AMD was like pressing gas and break at the same time by the marketing people.

1) They compared intel CPU and wisely said both are 16 cores. not mentioning the threads, (AMD has a Bulldozer trauma about 'counting as full cores')
It's a fair comparison from CPU point of view. It's not AMD's fault that intel adds 'half cores' in their CPU and calls it 16 cores.

2) Marketing has two percent numbers to show the speed of your product: 45% or 31% ( -31% to be mathematically correct)
Your AMD System is 45% faster. (work/sec)
OR
Your work will be completed 31% faster. (time, 'faster' replaces the minus here I guess)

So why choose the smaller number?
"You can use 31% of your time to do something else" sounds more informative though than saying how much faster your new machine is.
But it's marketing do they care about informative?
(Graph below to show that the time % is always a smaller number than the faster %, and the bigger the number the bigger the difference between both)

3) "Advanced low-power architecture" on their Zen 4 slides.
intel is using small cores to handle low power usage but AMD said they can do the same thing with the same cores, eliminating all the problems that come with 'incompatible' cores in 1 CPU.
No further details we will have to wait to see how low they go compared to intel small cores.

4) 'AI acceleration instructions', they do mean the added AVX512 or is there more? I guess they prefer to avoid the AVX512 term, they plan to add more acceleration hardware in Zen5

 

[uzzi38]

Nothing.

It's already delayed to 2023, so it's not possible for it to be "ahead of schedule". We don't even know how many Meteor Lake SKUs there will be, or if desktop will get any kind of Meteor Lake with core counts competitive with Raptor Lake. AMD is going to launch Phoenix and Dragon Ridge, and just ride those for awhile. They'll be fine. On desktop? Who knows? Again, probably nothing.

Probably another 3D refresh I'd guess.

 

[uzzi38]

Also, I remember someone commenting a day or two ago (which is probably like 300 messages back by now...) that Blender takes advantage of AVX-512, not sure if that point was discussed, but it doesn't really seem to be the case:

 

[Hans Gruber]

Also, I remember someone commenting a day or two ago (which is probably like 300 messages back by now...) that Blender takes advantage of AVX-512, not sure if that point was discussed, but it doesn't really seem to be the case:

View attachment 62130

Here is my shot at Intel. they dropped hyperthreading in the 9700k not because they didn't think they needed it. They dropped it because of the spectre issue. People asked where the hyperthreading went. Intel said, you don't need hyperthreading not answering the reason why it disappeared for a CPU generation. Then they dropped AVX-512 from Alder Lake because the hybrid structure would not work with it.

 

[JoeRambo]

They dropped it because of the spectre issue. People asked where the hyperthreading went. Intel said, you don't need hyperthreading not answering the reason why it disappeared for a CPU generation.

9900K ? Can we stop with baseless conspiracy and instead focus on cancer that was Intel's Marketing and Segmenting department. Frankly segmentation by taking away HT is minor sin for morons who planned to herd and milk all enthuasiasts to HEDT platform and give them "unlocked" entry level Skylake desktop CPUs.

 

[Hans Gruber]

9900K ? Can we stop with baseless conspiracy and instead focus on cancer that was Intel's Marketing and Segmenting department. Frankly segmentation by taking away HT is minor sin for morons who planned to herd and milk all enthuasiasts to HEDT platform and give them "unlocked" entry level Skylake desktop CPUs.

I said 9700K, Rambo. Not 9900k which had hyperthreading. My point is Intel makes excuses when things do not go right. Then people say I thought AVX-512 was an important feature. Hyperthreading (SMT) is supposed to be a good thing. It is, but they don't want to admit failure or mistakes in their processor design. Without hyperthreading, spectre didn't affect Intel CPU's. That was their easy fix.

I could go on about Intel. 32bit processors are all people really need. 64bit processors are a gimmick or unnecessary.

 

[JoeRambo]

I said 9700K, Rambo. Not 9900k which had hyperthreading. My point is Intel makes excuses when things do not go right.

Were You sleeping under some rock? Intel has been using HT as segmentation option since ages. I think in modern history it was first used by 2500K, that was popular CPU without HT enabled. It might even happened in Nehalem generation already, no doubt about it.
But please lets not make up things about security and so on. Marketing and MBA guys in general do not need excuses to maximise the profits when competition allows them to.

 

[Hans Gruber]

Were You sleeping under some rock? Intel has been using HT as segmentation option since ages. I think in modern history it was first used by 2500K, that was popular CPU without HT enabled. It might even happened in Nehalem generation already, no doubt about it.
But please lets not make up things about security and so on. Marketing and MBA guys in general do not need excuses to maximise the profits when competition allows them to.

I was not sleeping, 8700K had hyperthreading and the 9700k did not because of spectre. HT returned with the 10700K. Do your homework.

 

[jpiniero]

Also, I remember someone commenting a day or two ago (which is probably like 300 messages back by now...) that Blender takes advantage of AVX-512, not sure if that point was discussed, but it doesn't really seem to be the case:

Maybe the 5950X is bandwidth limited?

 

[Accord99]

I was not sleeping, 8700K had hyperthreading and the 9700k did not because of spectre. HT returned with the 10700K. Do your homework.

The 9700K didn't have HT because it was the #2 CPU in Intel's lineup and it having 8 non-HT cores was enough to trade blows with the 2700x. It didn't need to beat the 2700x in everything, that was the job for the 9900K and its higher price tag.

 

[Timmah!]

It was posted here on this thread: Same size as the current SP3 (Napels/Rome/Milan) package. Looks like it also has 8 DIMMS. Maybe on request of motherboard/system builders to make it easier to fit it into existing systems.
View attachment 62115
View attachment 62117

Thank you, i must have missed that somehow. When is this supposed to be released, or not known yet?
If i knew about this, would not posted all that stuff about 24C Ryzen 7000, cause existence of this makes even speculating about that obsolete.

 

[uzzi38]

Maybe the 5950X is bandwidth limited?

In Blender? No chance, Blender pretty rarely (if ever) has to reach out into main memory.

 

[nicalandia]

In Blender? No chance, Blender pretty rarely (if ever) has to reach out into main memory.

So blender is a good measurement of true IPC gains based on uArch design instead of new IO or memory interface?

 

[deasd]

Also, I remember someone commenting a day or two ago (which is probably like 300 messages back by now...) that Blender takes advantage of AVX-512, not sure if that point was discussed, but it doesn't really seem to be the case:

View attachment 62130

well, from your LTT's graph I begin to suspect the long time load of larger size/complex demo force AlderLake throttling, due to heat or bandwidth.....even the 12600k throttling like hell on this LTT's graph, i could be wrong

another evidence provide by Puget System , 12900k has lower score for 10 minutes run while AMD with no throttling

 

[uzzi38]

well, from your LTT's graph I begin to suspect the long time load of larger size/complex demo force AlderLake throttling, due to heat or bandwidth.....even the 12600k throttling like hell on this LTT's graph

another evidence provide by Puget System , 12900k has lower score for 10 minutes run while AMD with no throttling
View attachment 62133

Uh, the Rocket Lake results are the useful ones from the graph I posted, not the Alder Lake rssults. ADL still has AVX-512 disabled here because the littles are enabled.

But yes, as a side note Alder Lake is slightly power limited at it's stock 241W power limit in certain workloads.

 

[deasd]

Uh, the Rocket Lake results are the useful ones from the graph I posted, not the Alder Lake rssults. ADL still has AVX-512 disabled here because the littles are enabled.

But yes, as a side note Alder Lake is slightly power limited at it's stock 241W power limit in certain workloads.

IIRC there's no rendering project(Blender, vray, corona) support AVX512, since this instruction draw too much power/heat, and maybe it's the reason why disable it in ADL which is power limited. Very interesting to see how will AMD do with AVX512 with superior process.

 

[tamz_msc]

Uh oh....

https://www.tomshardware.com/news/amd-corrects-socket-am5-for-ryzen-7000-power-specs-230w-peak-power-170w-tdp

 

[tamz_msc]

IIRC there's no rendering project(Blender, vray, corona) support AVX512, since this instruction draw too much power/heat, and maybe it's the reason why disable it in ADL which is power limited. Very interesting to see how will AMD do with AVX512 with superior process.

AVX512 is disabled on Alder Lake because E-cores do not support it. Enabling it would cause OS scheduling issues.

 

[nicalandia]

Uh oh....

https://www.tomshardware.com/news/amd-corrects-socket-am5-for-ryzen-7000-power-specs-230w-peak-power-170w-tdp

Great, that means the 40% MT Boost is correct because ALL Cores will be boosting 5Ghz+

 

[CakeMonster]

3) "Advanced low-power architecture" on their Zen 4 slides.
intel is using small cores to handle low power usage but AMD said they can do the same thing with the same cores, eliminating all the problems that come with 'incompatible' cores in 1 CPU.
No further details we will have to wait to see how low they go compared to intel small cores.

This is the interesting part to me with Z4 and RL, because there's no doubt you can squeeze more ST performance out of 'big cores' like Intel does on AL/RL, but is it worth it? We'll see when Z4 is up against RL. I presume AMD has been confident about Z4 and Z5 for a reason (Ian's interview with the AMD engineer).

I skipped AL because I was not ready to deal with W11 and lacking big.Little support last year, and I must admit what I've heard so far doesn't make me all that tempted to try it this year either. Z4 seems more tempting to me, but that's of course subjective, and every % performance lead of RL would of course be proportionally more convincing.