Discussion Dimensity 9300; The end of an era for the Cortex A5xx core?

[FlameTail]

Maybe Mediatek should have added an A520 core or two after all.

 

[FlameTail]

This is a very interesting diagram.

In the mid-range, At the same power- Cortex X3 is not that much more efficient than A715. And at low-range A715 is more efficient.

So

X3@4W = 1500 points.

A715@2W = 1000 points

[Rounded off numbers].

If we assume linear scaling for multi core performance from the single core scores;

Let's say we need to achieve 3000 points in multi core performance.

We'll need

2 × X3 = 3000 points @8W

3 × A715 = 3000 points @6W

__

So the A7xx cores are still the best way to scale multi-core performance ig.

 

[FlameTail]

Also the fact that X-cores take up more area as well.

Double whammy of high power consumption and more cost.

Maybe this is why the two-X.core design of previous Google Tensor SoCs was a 'failure'.

 

[FlameTail]

Dimensity 9300

https://x.com/Tech_Reve/status/1715205374155116923?s=20

 

[qmech]

View attachment 87064This is a very interesting diagram.

In the mid-range, At the same power- Cortex X3 is not that much more efficient than A715. And at low-range A715 is more efficient.

So

X3@4W = 1500 points.

A715@2W = 1000 points

[Rounded off numbers].

If we assume linear scaling for multi core performance from the single core scores;

Let's say we need to achieve 3000 points in multi core performance.

We'll need

2 × X3 = 3000 points @8W

3 × A715 = 3000 points @6W

__

So the A7xx cores are still the best way to scale multi-core performance ig.

That is a somewhat dubious conclusion. If you don't care about the extra die size of the X3 cores, they are clearly much more efficient in multithreaded loads. CPU performance is not linear with power (frequency), so to achieve *at least* 3000 points a better comparison would be:

3 x A715 = 3000 points @ 6W
3 x X3 = 3300 points @ 6W

In terms of performance / W, the X3 is clearly substantially better once you get above ~ 1.5 W package power.

That does not mean the X3 would be the best option in all scenarios. Not only does it take up more area, it also likely uses more power at lower utilization rates. That will not show up in benchmarks, but if you imagined a SoC that had only X3 cores, the practical battery life would likely be very poor compared to one that *also* had cores with lower absolute power usage.

In other words, if your intent is to make a server chip, X3s would be the way to go. If your target is a phone, however, X3s might win benchmarks in performance / watt, but actual battery life would suffer.

 

[NTMBK]

Dimensity 9300

https://x.com/Tech_Reve/status/1715205374155116923?s=20

View attachment 87484

Is that good or bad? I don't have Geekbench scores memorized.

 

[hemedans]

Is that good or bad? I don't have Geekbench scores memorized.

Less than 10% faster than leaked score of 8 gen 3.

 

[FlameTail]

Less than 10% faster than leaked score of 8 gen 3.

Leaked score of 8gen3 was 2200/6800 iirc.

 

[FlameTail]

https://x.com/TheGalox_/status/1715236151685005615?s=20

 

[soresu]

In other words, if your intent is to make a server chip, X3s would be the way to go

That would be Neoverse V2 you mean (as in the nVidia Grace chip).

Since the introduction of Neoverse IP there are no server/datacenter SoC designs using Cortex IP anymore - the former is designed with scale in mind and extra uncore infrastructure baked in, whereas the latter are now exclusively consumer electronics bound.

The Neoverse CPU cores are mostly similar, but there are some differences here and there not seen in the Cortex X cores they are based on, like V1 having the LSE2 instruction set that X1 does not (but X2 does) as per the FEX-emu dev team.

It would be nice to get a full blown V2 based SoC to play with as long as the software infrastructure for running OSS drivers on ARM ISA platforms has been properly worked out at this point.

 

[FlameTail]

Flagship Android chips going into 2024.

 

[FlameTail]

The Tensor is getting absolutely buried here. Funny, it feels out of place. Slower than previous gen Snapdragon 8 gen 2 in both single/multi scores

 

[Doug S]

The Tensor is getting absolutely buried here. Funny, it feels out of place. Slower than previous gen Snapdragon 8 gen 2 in both single/multi scores

Google is going to have sell pretty heavily on "AI" to make consumers overlook how it will be behind every other Android phone (at similar prices) performance wise.

 

[FlameTail]

Google is going to have sell pretty heavily on "AI" to make consumers overlook how it will be behind every other Android phone (at similar prices) performance wise.

I don't this thing can hold up for 7 years of OS updates.

I mean sure it will be functional, but it's not going to be smooth.

 

[FlameTail]

DIMENSITY 9400 COMING NEXT YEAR (FEB. 2024) WITH TSMC 3nm

https://x.com/TheGalox_/status/1716360296560738707?s=20

 

[FlameTail]

MediaTek Dimensity 9300 deep dive: A true Snapdragon rival?

The MediaTek Dimensity 9300 mobile processor boasts a powerhouse CPU design and AI capabilities, here's what you need to know.

www.androidauthority.com

DIMENSITY 9300 is here!

 

[FlameTail]

 

[Tup3x]

Almost feels like this is some kind of test run for PC chip.

 

[FlameTail]

One weird thing is that it is reportedly using a "3rd Generation TSMC 4nm process"



What is that?



N4 is first-gen 4nm

N4P is second gen 4nm

 

[JasonLD]

One weird thing is that it is reportedly using a "3rd Generation TSMC 4nm process"



What is that?



N4 is first-gen 4nm

N4P is second gen 4nm

N4X? Though this is tailored for HPC stuff so might still be N4P.

TSMC Details N4X Process for HPC: Extreme Performance at Minimum Leakage

www.anandtech.com

 

[capricornsunvoyager2]

One weird thing is that it is reportedly using a "3rd Generation TSMC 4nm process"



What is that?



N4 is first-gen 4nm

N4P is second gen 4nm

Yeah, that's weird. My guess, it's marketing. It's the 3rd generation of the 5nm family, if we begin with N5, then N4, now N4P.

 

[moinmoin]

One weird thing is that it is reportedly using a "3rd Generation TSMC 4nm process"



What is that?



N4 is first-gen 4nm

N4P is second gen 4nm

On the slide they wrote "4nm+ N4P".

MediaTek reportedly previously used N4 without making actual use of the density gains afforded by N4 over N3 (maybe a straight mask port? no idea). May have been the same with N4P and now they did some actual adaption of the design to the node, making actual use of more of that node's advantages?

 

[capricornsunvoyager2]

View attachment 88421

This is what is the most interesting for me. I can see that Mediatek is not after the MT Performance Crown, that's more of an effect of their strategy. They are going for the 33% Lower Power at same performance (Theoretically, the X4 at mid-speed are more efficient than the A720 at peak performance).

Looking to how it compared to Qualcomm's implementation, relying on the A720s, to see if the extra cost (Both in licenses and in manufacturing) are going to be worth it for Mediatek.

 

[FlameTail]

On the slide they wrote "4nm+ N4P".

MediaTek reportedly previously used N4 without making actual use of the density gains afforded by N4 over N3 (maybe a straight mask port? no idea). May have been the same with N4P and now they did some actual adaption of the design to the node, making actual use of more of that node's advantages?

Oh yes. Exactly.

Dimensity 9000 (2021) was made on N4 with a direct port which didn't make use of the density gains. -source: Semianalysis.

 

[FlameTail]

This is what is the most interesting for me. I can see that Mediatek is not after the MT Performance Crown, that's more of an effect of their strategy. They are going for the 33% Lower Power at same performance (Theoretically, the X4 at mid-speed are more efficient than the A720 at peak performance).

Looking to how it compared to Qualcomm's implementation, relying on the A720s, to see if the extra cost (Both in licenses and in manufacturing) are going to be worth it for Mediatek.

Can't wait for Geekerwan's testing