Discussion Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)

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inf64

Diamond Member
Mar 11, 2011
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3500 seems to be the rumor.
I think that was supposedly done on an ES that had clock regression (which is supposedly now addressed).It would be really crazy to see Zen 5 clock the same for 1T as Zen 4, with all the stuff they added/changed. But AMD did it with Zen 2 -> Zen 3 on the same node, so it would not be unheard of.
 

Goop_reformed

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Sep 23, 2023
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I think that was supposedly done on an ES that had clock regression (which is supposedly now addressed).It would be really crazy to see Zen 5 clock the same for 1T as Zen 4, with all the stuff they added/changed. But AMD did it with Zen 2 -> Zen 3 on the same node, so it would not be unheard of.
Nah no way, only 10-15% ipc increase with clock regression. All that for $999 launch date Q4, availability Q1 2025. Tame your expectation bro you're getting 10% single thread uplift at most. /s
 

NostaSeronx

Diamond Member
Sep 18, 2011
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I don't know if there's coming clustered - split register file - risc-v design but it's sure that risc-v even considered to split registers in ISA level.
This isn't needed on RISC-V ISA's part only on the Architectural ISA.

Nanhu -> 192 Integer Registers // RISC-V: 32 Regs (Standard) and down to ~8 Regs (Compressed)
//With a good OoO internal ISA RV64C has a negligible loss against RV64I.

Clustering is handled by the architecture never the ISA. All RISC-V needs to do is report core having 1 HART for ST-mode and 2(or more) HARTs for MT-mode. Everything else is on the actual core.
ARM and x86 are adding instructions for every possible side-case. Risc-v is better but even there is million proposals to add very hardware-specific instructions. And ISA does not have to support clustering - compiler can cluster every ISA as it wants( only practical with enough hardware registers) and Risc-V so far have not added any clustering-specific instructions - only have kept path for clustering open for not implementing instructions that makes clustering difficult.
The software-facing ISA doesn't need to handle clustering. The pure reason for clustered cores is to handle decrease in figure in Dynamic EPI given extremely large monolithic cores. Clustered cores always win in the wider Energy per ILP(EPI) race. Large Monolithic cores have high energy consumption for their growth in ILP. While Large Clustered cores have low energy consumption given same IPC/ILP.

I won't be surprised to see the Integer core in Zen5 to be clustered: 3 ALU+2 AGU+xPRF ~ 3 ALU+2 AGU+yPRF. They don't need to report any changes as it isn't adding an additional core. They didn't even report Zen5 still having a split-reg file for FPU Cluster0 and FPU Cluster1 from Zen3/Zen4. While the Fstore instruction behavior still indicate that it exists. We won't be able to tell till someone peels one open and takes a die shot.
Nobody is going to change the entire programming model, which is what clustering would require.
Clustered Micorarchitectures doesn't touch the ISA or programming models. It is either a CMP core or a SMT2 core to software.
 
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Saylick

Diamond Member
Sep 10, 2012
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Guess i am just slightly annoyed by the state of modern "journalism".
You can blame WTFTech for proving that you can be relatively successful in the tech journalism biz by just vomiting mass quantities of low-level regurgitated articles. Look at everyone else now: Videocardz, Tom's Hardware, a bunch of other tech outlets do essentially the same thing. Honestly, I believe that if Twitter were to go under, WTFTech and a bunch of other outlets would lose a significant portion of their sources for content.
 

FlameTail

Platinum Member
Dec 15, 2021
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You can blame WTFTech for proving that you can be relatively successful in the tech journalism biz by just vomiting mass quantities of low-level regurgitated articles. Look at everyone else now: Videocardz, Tom's Hardware, a bunch of other tech outlets do essentially the same thing.
It's a great sorrow, that we do not have high standard tech journalism like old Anandtech, nowadays.
 
Jul 27, 2020
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Honestly, I believe that if Twitter were to go under, WTFTech and a bunch of other outlets would lose a significant portion of their sources for content.
It's symbiotic in a way, no? One is a platform for aggregating often-time-sensitive-juicy-info (arguably most of it belonging in a cesspool) meant to affect or sway population sentiments while the other disseminates it.

And people get rumors/gossip without loading the Twitter domain on their computers.

WIN WIN!
 

naukkis

Senior member
Jun 5, 2002
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Nobody is going to change the entire programming model, which is what clustering would require. Also, the kind of "weave independent execution paths together" that you propose really would not help as much as you think, because in practice execution time of those independent paths are going to be wildly variable, because of unpredictable memory latency. As in, as soon as you do anything more complicated than compute Pi, you should expect fully independent code paths to diverge by thousands of instructions, not tens. And at that point, one of them is going to just lag enough that everything else stalls on it.



Proverbially, no-one actually does that. In the entire industry a few weirdoes recompile code, and everyone else runs the same binaries they have for two decades. Only slightly exaggerating.

High-IPC situations aren't those general patterns. There's no need for high IPC in memory-bound use. To actual hit hig IPC in code path needs optimization - and lots of them - to tune memory access patterns for cache and so on to being able to extract that IPC core is capable. But that's actually not so bad as most use cases those compute-intensive loops are so tiny part of whole code that actually optimizing them isn't so big deal.

Also doing clustering doesn't actually vary paths a lot - there's usually one clock cycle additional latency crossing cluster boundaries so to extract additional IPC from other cluster needs only few instructions chain to be beneficial.
 
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Saylick

Diamond Member
Sep 10, 2012
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It's symbiotic in a way, no? One is a platform for aggregating often-time-sensitive-juicy-info (arguably most of it belonging in a cesspool) meant to affect or sway population sentiments while the other disseminates it.

And people get rumors/gossip without loading the Twitter domain on their computers.

WIN WIN!
In a way, yes, but if anything WTFTech is the leech when all they do is just repackage what's being written on Twitter into a format that nets them ad revenue. The worst part is that a basic news aggregator would do the same job perfectly fine, yet WTFTech in their efforts to regurgitate and not purely plagiarize often times misrepresents the leaker(s) by either adding info that was NOT said by the leaker(s) OR misinterpreting the info entirely. It's self-evident that the writers there have sub-par tech knowledge (at least not beyond what the average PC gamer would know) and it shows. If someone like Ian Cuttress were to interview them, they couldn't explain what they were writing about beyond just stating what marketing slides say. I mean, c'mon. I've seen one of their "deep dive" CPU architecture articles before, and all they did was just summarize bullet points off the architecture slide deck. If all they can do is reiterate marketing slides, what are they besides a corporate plug?
 

Saylick

Diamond Member
Sep 10, 2012
3,217
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That's why I try not to go there. Videocardz and Tomshardware are vastly more bearable.
The WTFTech comments section is 100% definitive proof that the owners DGAF about journalistic integrity. What self-respecting news outlet would let a cesspool like that fester, let alone condone it. Since that toxic environment is what drives their regulars to keep visiting their website (read: bring in more ad revenue), they won't ever moderate or curb their comment section. It's always been about money to them, and is why I'll never take them seriously. Every single review of a product they've written about has always been positively reviewed; they simply will write positive reviews if given money or free products.
 

Saylick

Diamond Member
Sep 10, 2012
3,217
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3500 is for Strix I guess?

Phoenix is doing 2600 in GB6 ST.

3500 is a 900 point increase, aka about 35%, which fits with the IPC gain rumours.
Dang, that's pretty solid. PHX gets about 5.1 GHz ST boost if I recall correctly for the 8840HS. If DT Zen 5 has a small or non-existent clock regression (i.e. 5.5 GHz) then it should hit 3700 points.
 

Fjodor2001

Diamond Member
Feb 6, 2010
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Jul 27, 2020
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Where’d you hear that?

Very late Engineering Samples of AMD’s Zen5-Flagship, the Ryzen 9 8950X score 3500 points (ST) and 24k points (MT) in Geekbench 6.2.

Of course, take that with a boulder of salt.

P.S. And just like that, I discover that there is a company called https://www.bouldersaltcompany.com/
 

Hitman928

Diamond Member
Apr 15, 2012
5,392
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